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May 2004
2004 Fairchild Semiconductor Corporation
FDZ209N Rev B2 (W)
FDZ209N
60V N-Channel PowerTrench
BGA MOSFET
General Description
Combining Fairchild's advanced PowerTrench process
with state-of-the-art BGA packaging, the FDZ209N
minimizes both PCB space and R
DS(ON)
. This BGA
MOSFET embodies a breakthrough in packaging
technology which enables the device to combine
excellent thermal transfer characteristics, high current
handling capability, ultra-low profile packaging, low gate
charge, and low R
DS(ON)
.
Applications
Solenoid Drivers
Features
4 A, 60 V.
R
DS(ON)
= 80 m
@ V
GS
= 5 V
Occupies only 5 mm
2
of PCB area: only 55% of the
area of SSOT-6
Ultra-thin package: less than 0.80 mm height when
mounted to PCB
Outstanding thermal transfer characteristics:
4 times better than SSOT-6
Ultra-low Q
g
x R
DS(ON)
figure-of-merit
High power and current handling capability
Bottom
Index
slot
Top
S
D
G
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
Ratings
Units
V
DSS
Drain-Source Voltage
60
V
V
GSS
Gate-Source Voltage
20
V
I
D
Drain Current Continuous
(Note 1a)
4
A
Pulsed
20
P
D
Power Dissipation (Steady State)
(Note 1a)
2
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
55 to +150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
64
C/W
R
JB
Thermal Resistance, Junction-to-Ball
(Note 1)
8
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
0.7
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
209N
FDZ209N
7''
8mm
3000 units
Index
slot
G
S
S
S
D
D
D
S
S
D
D
D
F
D
Z
2
0
9
N
FDZ209N Rev B2 (W)
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Drain-Source Avalanche Ratings
(Note 2)
W
DSS
Drain-Source Avalanche Energy
Single Pulse, V
DD
= 30 V,
90
mJ
I
AR
Drain-Source Avalanche Current
I
D
= 4 A
4
A
Off Characteristics
BV
DSS
DrainSource Breakdown Voltage V
GS
= 0 V,
I
D
= 250
A
60
V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25
C
59
mV/
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 48 V,
V
GS
= 0 V
1
A
I
GSS
GateBody Leakage.
V
GS
=
20 V,
V
DS
= 0 V
100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
,
I
D
= 250
A
1
2.5
3
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25
C
6
mV/
C
R
DS(on)
Static DrainSource
OnResistance
V
GS
= 5 V,
I
D
= 4 A
V
GS
= 5 V, I
D
= 4 A, T
J
=125
C
60
91
80
130
m
g
FS
Forward Transconductance
V
DS
= 5 V,
I
D
= 4 A
12
S
Dynamic Characteristics
C
iss
Input Capacitance
657
pF
C
oss
Output Capacitance
76
pF
C
rss
Reverse Transfer Capacitance
V
DS
= 30 V,
V
GS
= 0 V,
f = 1.0 MHz
32
pF
R
G
Gate Resistance
V
GS
= 15 mV,
f = 1.0 MHz
1.5
Switching Characteristics
(Note 2)
t
d(on)
TurnOn Delay Time
18
32
ns
t
r
TurnOn Rise Time
4
8
ns
t
d(off)
TurnOff Delay Time
15
27
ns
t
f
TurnOff Fall Time
V
DD
= 30 V,
I
D
= 1 A,
V
GS
= 5 V,
R
GEN
= 6
8
16
ns
Q
g
Total Gate Charge
6.3
9
nC
Q
gs
GateSource Charge
2.5
nC
Q
gd
GateDrain Charge
V
DS
= 30 V,
I
D
= 4 A,
V
GS
= 5 V
2.5
nC
DrainSource Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous DrainSource Diode Forward Current
1.7
A
V
SD
DrainSource Diode Forward
Voltage
V
GS
= 0 V, I
S
= 1.7 A
(Note 2)
0.77
1.2
V
t
rr
Diode Reverse Recovery Time
27
nS
Q
rr
Diode Reverse Recovery Charge
I
F
= 4A
d
iF
/d
t
= 100 A/s
(Note 2)
45
nC
Notes:
1.
R
JA
is determined with the device mounted on a 1 in 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to
the circuit board side of the solder ball, R
JB
, is defined for reference. For R
JC
, the thermal reference point for the case is defined as the top surface of the
copper chip carrier. R
JC
and R
JB
are guaranteed by design while R
JA
is determined by the user's board design.
a)
64C/W when
mounted on a 1in
2
pad
of 2 oz copper, 1.5" x
1.5" x 0.062" thick
PCB
b)
128C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
s, Duty Cycle < 2.0%
F
D
Z
2
0
9
N
FDZ209N Rev B2 (W)
Dimensional Outline and Pad Layout
F
D
Z
2
0
9
N
FDZ209N Rev B2 (W)
Typical Characteristics
0
5
10
15
20
0
1
2
3
4
5
6
7
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
,
D
R
A
I
N
C
U
R
R
E
N
T
(
A
)
4.3V
4.8V
4.5V
4.0V
V
GS
= 5.0V
3.8V
0.8
1
1.2
1.4
1.6
1.8
0
5
10
15
20
I
D
, DRAIN CURRENT (A)
R
D
S
(
O
N
)
,
N
O
R
M
A
L
I
Z
E
D
D
R
A
I
N
-
S
O
U
R
C
E
O
N
-
R
E
S
I
S
T
A
N
C
E
V
GS
= 4.0V
4.8V
5.0V
4.5V
4.3V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
D
S
(
O
N
)
,
N
O
R
M
A
L
I
Z
E
D
D
R
A
I
N
-
S
O
U
R
C
E
O
N
-
R
E
S
I
S
T
A
N
C
E
I
D
= 4A
V
GS
= 5.0V
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
3
3.5
4
4.5
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
D
S
(
O
N
)
,
O
N
-
R
E
S
I
S
T
A
N
C
E
(
O
H
M
)
I
D
=2A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
5
10
15
20
2
2.5
3
3.5
4
4.5
5
5.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
,
D
R
A
I
N
C
U
R
R
E
N
T
(
A
)
T
A
= -55
o
C
25
o
C
125
o
C
V
DS
= 5V
0.0001
0.001
0.01
0.1
1
10
100
0
0.2
0.4
0.6
0.8
1
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
I
S
,
R
E
V
E
R
S
E
D
R
A
I
N
C
U
R
R
E
N
T
(
A
)
T
A
= 125
o
C
25
o
C
-55
o
C
V
GS
= 0V
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
F
D
Z
2
0
9
N
FDZ209N Rev B2 (W)
Typical Characteristics
0
1
2
3
4
5
6
7
0
2
4
6
8
10
Q
g
, GATE CHARGE (nC)
V
G
S
,
G
A
T
E
-
S
O
U
R
C
E
V
O
L
T
A
G
E
(
V
)
I
D
= 4A
V
DS
= 20V
40V
30V
0
200
400
600
800
1000
0
10
20
30
40
50
60
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
A
P
A
C
I
T
A
N
C
E
(
p
F
)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
,
D
R
A
I
N
C
U
R
R
E
N
T
(
A
)
DC
10s
1s
100ms
R
DS(ON)
LIMIT
V
GS
= 5.0V
SINGLE PULSE
R
JA
= 128
o
C/W
T
A
= 25
o
C
10ms
1ms
0
10
20
30
40
50
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
P
(
p
k
)
,
P
E
A
K
T
R
A
N
S
I
E
N
T
P
O
W
E
R
(
W
)
SINGLE PULSE
R
JA
= 128C/W
T
A
= 25C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r
(
t
)
,
N
O
R
M
A
L
I
Z
E
D
E
F
F
E
C
T
I
V
E
T
R
A
N
S
I
E
N
T
T
H
E
R
M
A
L
R
E
S
I
S
T
A
N
C
E
R
JA
(t) = r(t) * R
JA
R
JA
= 128 C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
F
D
Z
2
0
9
N
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