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2002 Fairchild Semiconductor Corporation
DS500721
www.fairchildsemi.com
December 2001
Revised January 2002
FI
N1001
3.
3V L
V
DS 1-
Bit
Hi
gh Spe
e
d Di
ff
erent
i
al
D
r
ive
r
FIN1001
3.3V LVDS 1-Bit High Speed Differential Driver
General Description
This single driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates LVTTL signal levels to LVDS lev-
els with a typical differential output swing of 350 mV which
provides low EMI at ultra low power dissipation even at
high frequencies. This device is ideal for high speed trans-
fer of clock or data.
The FIN1001 can be paired with its companion receiver,
the FIN1002, or with any other LVDS receiver.
Features
I
Greater than 600Mbs data rate
I
3.3V power supply operation
I
0.5ns maximum differential pulse skew
I
1.5ns maximum propagation delay
I
Low power dissipation
I
Power-Off protection
I
Meets or exceeds the TIA/EIA-644 LVDS standard
I
Flow-through pinout simplifies PCB layout
I
5-Lead SOT23 package saves space
Ordering Code:
Pin Descriptions
Function Table
H
=
HIGH Logic Level
L
=
LOW Logic Level
Connection Diagram
Pin Assignment for SOT23
(Top View)
Order Number
Package Number
Package Description
FIN1001M5
MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [250 Units on Tape and Reel]
FIN1001M5X
MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [3000 Units on Tape and Reel]
Pin Name
Description
D
IN
LVTTL Data Input
D
OUT
+
Non-inverting LVDS Driver Output
D
OUT
-
Inverting LVDS Driver Output
V
CC
Power Supply
GND
Ground
NC
No Connect
Input
Outputs
D
IN
D
OUT
+
D
OUT
-
L
L
H
H
H
L
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2
FIN1001
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: The "Absolute Maximum Ratings": are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 2: All typical values are at T
A
=
25
C and with V
CC
=
3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at T
A
=
25
C and with V
CC
=
3.3V.
Note 4: t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Supply Voltage (V
CC
)
-
0.5V to
+
4.6V
DC Input Voltage (D
IN
)
-
0.5V to
+
6V
DC Output Voltage (D
OUT
)
-
0.5V to
+
4.6V
Driver Short Circuit Current (I
OSD
)
Continuous
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Max Junction Temperature (T
J
)
150
C
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
ESD (Human Body Model)
7500V
ESD (Machine Model)
500V
Supply Voltage (V
CC
)
3.0V to 3.6V
Input Voltage (V
IN
)
0 to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 2)
V
OD
Output Differential Voltage
R
L
=
100
, See Figure 1
250
350
450
mV
V
OD
V
OD
Magnitude Change from
25
mV
Differential LOW-to-HIGH
V
OS
Offset Voltage
1.125
1.25
1.375
V
V
OS
Offset Magnitude Change from
25
mV
Differential LOW-to-HIGH
I
OFF
Power-Off Output Current
V
CC
=
0V, V
OUT
=
0V or 3.6V
20
A
I
OS
Short Circuit Output Current
V
OUT
=
0V
-
5.5
-
8
mA
V
OD
=
0V
4
8
V
IH
Input HIGH Voltage
2.0
V
CC
V
V
IL
Input LOW Voltage
GND
0.8
V
I
IN
Input Current
V
IN
=
0V or V
CC
20
A
I
I(OFF)
Power-Off Input Current
V
CC
=
0V, V
IN
=
0V or 3.6V
20
A
V
IK
Input Clamp Voltage
I
IK
=
-
18 mA
-
1.5
-
0.8
V
I
CC
Power Supply Current
No Load, V
IN
=
0V or V
CC
4.5
8
mA
R
L
=
100
, V
IN
=
0V or V
CC
6.5
10
C
IN
Input Capacitance
V
CC
=
3.3V
3.2
pF
C
OUT
Output Capacitance
V
CC
=
0V
3.3
pF
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
t
PLHD
Differential Propagation Delay
0.5
0.98
1.5
ns
LOW-to-HIGH
t
PHLD
Differential Propagation Delay
0.5
0.93
1.5
ns
HIGH-to-LOW
R
L
=
100
, C
L
=
10pF,
t
TLHD
Differential Output Rise Time (20% to 80%) See Figure 2 and Figure 3
0.4
0.5
1.0
ns
t
THLD
Differential Output Fall Time (80% to 20%)
0.4
0.5
1.0
ns
t
SK(P)
Pulse Skew |t
PLH
- t
PHL
|
0.05
0.5
ns
t
SK(PP)
Part-to-Part Skew (Note 4)
1.0
ns
3
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FI
N1001
FIGURE 1. Differential Driver DC Test Circuit
Note A: All input pulses have frequency
=
10 MHz, t
R
or t
F
=
2 ns
Note B: C
L
includes all probe and fixture capacitances
FIGURE 2. Differential Driver Propagation Delay and
Transition Time Test Circuit
FIGURE 3. AC Waveforms
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4
FIN1001
DC / AC Typical Performance Curves
FIGURE 4. Output High Voltage vs.
Power Supply Voltage
FIGURE 5. Output Low Voltage vs.
Power Supply Voltage
FIGURE 6. Output Short Circuit Current vs.
Power Supply Voltage
FIGURE 7. Differential Output Voltage vs.
Power Supply Voltage
FIGURE 8. Differential Output Voltage vs.
Load Resistor
FIGURE 9. Offset Voltage vs.
Power Supply Voltage
5
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FI
N1001
DC / AC Typical Performance Curves
(Continued)
FIGURE 10. Power Supply Current vs.
Frequency
FIGURE 11. Power Supply Current vs.
Power Supply Voltage
FIGURE 12. Power Supply Current vs.
Ambient Temperature
FIGURE 13. Differential Propagation Delay vs.
Power Supply
FIGURE 14. Differential Propagation Delay vs.
Ambient Temperature
FIGURE 15. Differential Pulse Skew (t
PLH
- t
PHL
) vs.
Power Supply Voltage
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