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2002 Fairchild Semiconductor Corporation
DS500730
www.fairchildsemi.com
February 2002
Revised February 2002
FI
N1002 L
V
DS
1-
Bit
Hi
gh
Speed Dif
f
e
r
ent
i
al
Rece
iver
FIN1002
LVDS 1-Bit High Speed Differential Receiver
General Description
This single receiver is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typ-
ical differential input threshold of 100 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipa-
tion even at high frequencies. This device is ideal for high
speed transfer of clock or data.
The FIN1002 can be paired with its companion driver, the
FIN1001, or with any other LVDS driver.
Features
s
Greater than 400Mbs data rate
s
3.3V power supply operation
s
0.4ns maximum pulse skew
s
2.5ns maximum propagation delay
s
Bus pin ESD (HBM) protection exceeds 10kV
s
Power-Off over voltage tolerant input and output
s
Fail safe protection for open-circuit and non-driven,
shorted or terminated conditions
s
High impedance output at V
CC
<
1.5V
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
5-Lead SOT23 package saves space
Ordering Code:
Pin Descriptions
Function Table
H
=
HIGH Logic Level
L
=
LOW Logic Level
Fail Safe
=
Open, Shorted, Terminated
Connection Diagram
Pin Assignment for SOT package
Top View
Order Number
Package Number
Package Description
FIN1002M5
MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [250 Units on Tape and Reel]
FIN1002M5X
MA05B
5-Lead SOT23, JEDEC MO-178, 1.6mm [3000 Units on Tape and Reel]
Pin Name
Description
R
OUT
LVTTL Data Output
R
IN
+
Non-inverting Driver Input
R
IN
-
Inverting Driver Input
V
CC
Power Supply
GND
Ground
NC
No Connect
Input
Outputs
R
IN
+
R
IN
-
R
OUT
L
H
L
H
L
H
Fail Safe Condition
H
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2
FIN1002
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: The "Absolute Maximum Ratings": are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 2: All typical values are at T
A
=
25
C and with V
CC
=
3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at T
A
=
25
C and with V
CC
=
3.3V.
Note 4: t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Supply Voltage (V
CC
)
-
0.5V to
+
4.6V
DC Input Voltage (R
IN
+
, R
IN
-
)
-
0.5V to
+
4.6V
DC Output Voltage (D
OUT
)
-
0.5V to
+
6V
DC Output Current (I
O
)
16 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Max Junction Temperature (T
J
)
150
C
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
Supply Voltage (V
CC
)
3.0V to 3.6V
Input Voltage (V
IN
)
0 to V
CC
Magnitude of Differential
Voltage (|V
ID
|)
100mV to V
CC
Common-mode Input
Voltage (V
IC
)
(0V
+
|V
ID
| /2) to (2.4
-
|V
ID
|/2)
Operating Temperature (T
A
)
-
40
C to
+
85
C
ESD (Human Body Model)
All Pins
8kV
LVDS pins to GND
10kV
ESD (Machine Model)
400V
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 2)
V
TH
Differential Input Threshold HIGH
See Figure 1; V
IC
=
+
0.05V, 1.2V, or 2.35V
100
mV
V
TL
Differential Input Threshold LOW
See Figure 1; V
IC
=
+
0.05V, 1.2V, or 2.35V
-
100
mV
I
IN
Input Current
V
IN
=
0V or V
CC
20
A
I
I(OFF)
Power-OFF Input Current
V
CC
=
0V, V
IN
=
0V or 3.6V
20
A
V
OH
Output HIGH Voltage
I
OH
=
-
100
A
V
CC
-
0.2
3.3
V
I
OH
=
-
8 mA
2.4
3.1
V
OL
Output LOW Voltage
I
OH
=
100
A
0.0
0.2
V
I
OL
=
8 mA
0.16
0.5
V
IK
Input Clamp Voltage
I
IK
=
-
18 mA
-
1.5
0.8
V
I
CC
Power Supply Current
(R
IN
+
=
1V and R
IN
-
=
1.4V), or
4
7
mA
(R
IN
+
=
1.4V and R
IN
-
=
1V)
C
IN
Input Capacitance
V
CC
=
3.3V
2.3
pF
C
OUT
Output Capacitance
V
CC
=
0V
2.8
pF
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
t
PLH
Propagation Delay LOW-to-HIGH
0.9
1.5
2.5
ns
t
PHL
Propagation Delay HIGH-to-LOW
0.9
1.5
2.5
ns
t
TLH
Output Rise Time (20% to 80%)
|V
ID
|
=
400 mV, C
L
=
10 pF
0.6
ns
t
THL
Output Fall Time (80% to 20%)
See Figure 1 and Figure 2
0.5
ns
t
SK(P)
Pulse Skew |t
PLH
- t
PHL
|
0.02
0.4
ns
t
SK(PP)
Part-to-Part Skew (Note 4)
1.0
ns
3
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FI
N1002
Note A: All input pulses have frequency
=
10MHz, t
R
or t
F
=
1ns
Note B: C
L
includes all probe and fixture capacitances
FIGURE 1. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test Circuit
FIGURE 2. LVDS Input to LVTTL Output AC Waveforms
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4
FIN1002
DC / AC Typical Performance Curves
FIGURE 3. Output High Voltage vs.
Power Supply Voltage
FIGURE 4. Output Low Voltage vs.
Power Supply Voltage
FIGURE 5. Output Short Circuit Current vs.
Power Supply Voltage
FIGURE 6. Power Supply Current vs.
Frequency
FIGURE 7. Power Supply Current vs.
Ambient Temperature
FIGURE 8. Differential Propagation Delay
Power Supply Voltage
5
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FI
N1002
DC / AC Typical Performance Curves
(Continued)
FIGURE 9. Differential Propagation Delay vs.
Ambient Temperature
FIGURE 10. Differential Skew vs.
Power Supply Voltage
FIGURE 11. Differential Skew vs.
Ambient Temperature
FIGURE 12. Differential Propagation Delay vs.
Differential Input Voltage
FIGURE 13. Differential Propagation Delay vs.
Common-Mode Voltage
FIGURE 14. Transition Time vs.
Power Supply Voltage
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