2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev.1.0.3
FPS
TM
is a trademark of Fairchild Semiconductor Corporation.
Features
Single Chip 700V Sense FET Power Switch for 7DIP
Precision Fixed Operating Frequency (134KHz)
FSD210B Consumes Under 0.1W at 265VAC & No Load
with Advanced Burst-Mode Operation
Internal Start-up Circuit
Pulse-by-Pulse Current Limiting
Over Load Protection (OLP)
Internal Thermal Shutdown Function (TSD)
Auto-Restart Mode
Under Voltage Lockout (UVLO) with Hysteresis
Built-in Soft Start
Frequency Modultation for EMI Reduction
FSD200B Does Not Require an Auxiliary Bias Winding
Applications
Charger & Adapter for Mobile Phone, PDA & MP3
Auxiliary Power for White Goods, PC, C-TV & Monitor
Related Application Notes
AN-4137, 4141, 4147(Flyback) / AN-4134(Forward) /
AN-4138(Charger)
Description
Each product in the FSD2x0B (x for 0, 1) family consists of
an integrated Pulse Width Modulator (PWM) and Sense
FET, and is specifically designed for high performance off-
line Switch Mode Power Supplies (SMPS) with minimal
external components. Both devices are integrated high volt-
age power switching regulators which combine an avalanche
rugged Sense FET with a current mode PWM control block.
The integrated PWM controller features include: a fixed
oscillator with frequency modulation for reduced EMI,
Under Voltage Lock Out (UVLO) protection, Leading Edge
Blanking (LEB), an optimized gate turn-on/turn-off driver,
Thermal Shut Down (TSD) protection and temperature com-
pensated precision current sources for loop compensation
and fault protection circuitry. When compared to a discrete
MOSFET and controller or RCC switching converter solu-
tion, the FSD2x0B devices reduce total component count,
design size, weight while increasing efficiency, productivity,
and system reliability. Both devices provide a basic platform
that is well suited for the design of cost-effective flyback
converters.
Notes:
1. Typical continuous power in a non-ventilated enclosed
adapter with sufficient drain pattern as a heat sinker, at
50
C ambient.
2. Maximum practical continuous power in an open frame
design with sufficient drain pattern as a heat sinker, at 50
C
ambient.
3. 230 VAC or 100/115 VAC with doubler.
Typical Circuit
Figure 1. Typical Flyback Application for FSD210B
Figure 2. Typical Flyback Application for FSD200B
OUTPUT POWER TABLE
PRODUCT
230VAC
15%
(3)
85-265VAC
Adapter
(1)
Open
Frame
(2)
Adapter
(1)
Open
Frame
(2)
FSD210B
5W
7W
4W
5W
FSD200B
5W
7W
4W
5W
FSD210BM
5W
7W
4W
5W
FSD200BM
5W
7W
4W
5W
Drain
Source
Vstr
Vfb
Vcc
PWM
AC
IN
DC
OUT
Drain
Source
Vstr
Vfb
Vcc
PWM
AC
IN
DC
OUT
FSD210B, FSD200B
Green Mode Fairchild Power Switch (FPS
TM
)
FSD210B, FSD200B
2
Internal Block Diagram
Figure 3. Functional Block Diagram of FSD210B
Figure 4. Functional Block Diagram of FSD200B
8
5
UVLO
Voltage
Ref
H
Vstr
Vcc
Internal
Bias
L
Rsense
I
LIM
S/S
3mS
4
1, 2, 3
7
OSC
S
R
Q
TSD
S
R
Q
LEB
OLP
Reset
A/R
DRIVER
Frequency
Modulation
5uA
250uA
Vck
Vth
SFET
Drain
GND
Vfb
V
SD
V
BURL
/
V
BURH
8.7/6.7V
I
DELAY
I
FB
BURST
Rsense
I
LIM
S/S
3mS
4
1, 2, 3
7
OSC
S
R
Q
TSD
S
R
Q
LEB
OLP
Reset
A/R
DRIVER
Frequency
Modulation
5uA
250uA
Vck
Vth
SFET
Drain
GND
Vfb
V
SD
7V
8
5
UVLO
Voltage
Ref.
HV/REG
INTERNAL
BIAS
ON/OFF
Vstr
Vcc
I
FB
I
DELAY
V
BURL
/
V
BURH
BURST
FSD210B, FSD200B
3
Pin Definitions
Pin Configuration
Figure 5. Pin Configuration (Top View)
Pin Number
Pin Name
Pin Function Description
1, 2, 3
GND
Sense FET source terminal on primary side and internal control ground.
4
Vfb
The feedback voltage pin is the inverting input to the PWM comparator and
it has a normal input level between 0.5V and 2.5V. It has a 0.25mA current
source connected internally while a capacitor and optocoupler are typically
connected externally. A feedback voltage of 4.5V triggers over load protec-
tion (OLP). There is a time delay while charging external capacitor Cfb from
3V to 4.5V using an internal 5uA current source. This time delay prevents
false triggering under transient conditions, but still allows the protection
mechanism to operate under true overload conditions.
5
Vcc
<FSD210B>
Positive supply voltage input. Although connected to an auxiliary transform-
er winding, current is supplied from pin 8 (Vstr) via an internal switch during
startup (see Internal Block Diagram section). It is not until Vcc reaches the
UVLO upper threshold (8.7V) that the internal start-up switch opens and de-
vice power is supplied via the auxiliary transformer winding.
<FSD200B>
This pin is connected to a storage capacitor. A high voltage regulator laid be-
tween pin 8 (Vstr) and this pin, provides supply voltage to the device during
startup and normal operation. The FSD200B eliminates the need for an aux-
iliary bias winding and associated external components.
7
Drain
The drain pins are designed to connect directly to the primary lead of the
transformer and are capable of switching a maximum of 700V for 7DIP and
670V for 7LSOP. Minimizing the length of the trace connecting these pins to
the transformer will decrease leakage inductance.
8
Vstr
This pin connects directly to the rectified AC line voltage source for both the
FSD200B and FSD210B.
For the FSD210B, at start up the internal switch supplies internal bias and
charges an external storage capacitor placed between the Vcc pin and
ground. Once the Vcc reaches 8.7V, the internal switch is opened.
For the FSD200B, an internal high voltage regulator provides constant sup-
ply voltage.
1
2
3
4
5
7
8
GND
Vcc
Vfb
Vstr
Drain
7DIP
7LSOP
GND
GND
FSD210B, FSD200B
4
Absolute Maximum Ratings
(Ta=25
C, unless otherwise specified)
Thermal Impedance
(Ta=25
C, unless otherwise specified)
Note:
1. Free standing with no heatsink. / Measurement Condition : Just before junction temperature T
J
enters into OTP.
2. Measured on the DRAIN pin close to plastic interface.
3. Soldered to 100mm
2
copper clad.
4. Soldered to 300mm
2
copper clad.
5. Without copper clad.
- all items are tested with the standards JESD 51-2, 51-3 (SOP) and 51-10 (DIP).
Characteristic
Symbol
Value
Unit
Drain Pin Voltage
7DIP
V
DRAIN
700
V
Vstr Pin Voltage
V
STR
700
V
Total Power Dissipation
P
D
1.68
W
Drain Pin Voltage
7LSOP
V
DRAIN
670
V
Vstr Pin Voltage
V
STR
670
V
Total Power Dissipation
P
D
1.45
W
Supply Voltage
FSD200B
V
CC
10
V
Feedback Voltage Range
V
FB
-0.3 to V
CC
V
Supply Voltage
FSD210B
V
CC
20
V
Feedback Voltage Range
V
FB
-0.3 to V
STOP
V
Operating Junction Temperature
T
J
Internally limited
C
Operating Ambient Temperature
T
A
-25 to +85
C
Storage Temperature
T
STG
-55 to +150
C
Parameter
Symbol
Value
Unit
7DIP
Junction-to-Ambient Thermal
(1)
JA
(3)
74.07
C/W
JA
(4)
60.44
C/W
Junction-to-Case Thermal
(2)
JC
22.00
C/W
7LSOP
Junction-to-Ambient Thermal
(1)
JA
(5)
86.02
C/W
Junction-to-Case Thermal
(2)
JC
27.72
C/W
FSD210B, FSD200B
5
Electrical Characteristics
(Ta = 25
C unless otherwise specified)
Note:
1. These parameters, although guaranteed, are not 100% tested in production
2. These parameter is derived from characterization
Parameter Symbol
Condition
Min.
Typ.
Max.
Unit
SENSE FET SECTION
Zero-Gate-Voltage Drain Current
I
DSS
V
DS
=560V, V
GS
=0V -
-
100
A
Drain-Source On-State Resistance
R
DS(ON)
Tj=25
C, I
D
=25mA -
28
32
Tj=100
C, I
D
=25mA -
42
48
Rise Time
t
r
V
DS
=325V, I
D
=50mA
-
100
-
ns
Fall Time
t
f
V
DS
=325V, I
D
=25mA
-
50 -
ns
CONTROL SECTION
Switching Frequency
f
OSC
Tj=25
C
126 134 142 KHz
Switching Frequency Modulation Range
f
MOD
Tj=25
C
-
4
-
KHz
Maximum Duty Cycle
D
MAX
V
FB
=3.5V
60 66 72 %
Minimum Duty Cycle
D
MIN
V
FB
=GND
0 0 0 %
UVLO Threshold Voltage (FSD200B)
V
START
6.3
7
7.7
V
V
STOP
After turn on
5.3
6
6.7
V
UVLO Threshold Voltage (FSD210B)
V
START
8.0
8.7
9.4
V
V
STOP
After turn on
6.0
6.7
7.4
V
Feedback Source Current
I
FB
V
FB
=GND 0.22
0.25
0.28
mA
Internal Soft Start Time
t
S/S
-
3
-
ms
BURST MODE SECTION
Burst Mode Voltage
V
BURH
Tj=25
C
0.58
0.64 0.7 V
V
BURL
0.5 0.58 0.64 V
V
BUR(HYS)
Hysteresis
-
60 -
mV
PROTECTION SECTION
Peak Current Limit
I
LIM
i/t=150mA/us
0.275 0.320 0.365 A
Current Limit Delay Time
(1)
t
CLD
Tj=25
C
- 220
- ns
Thermal Shutdown Temperature
(1)
T
SD
125
145
160
C
Shutdown Feedback Voltage
V
SD
4.0
4.5
5.0
V
Leading Edge Blanking Time
(2)
t
LEB
200
-
-
ns
Shutdown Delay Current
I
DELAY
V
FB
=4.0V
3 5 7
A
TOTAL DEVICE SECTION
Operating Supply Current (FSD200B)
I
OP
(control part only)
,V
CC
=7V
- 600
-
A
Start-Up Charging Current (FSD200B)
I
CH
V
CC
=0V
-
1
1.2
mA
Operating Supply Current (FSD210B)
I
OP
(control part only)
,V
CC
=11V
- 700
-
A
Start-Up Charging Current (FSD210B)
I
CH
V
CC
=0V
-
700
900
A
Vstr Supply Voltage
V
STR
V
CC
=0V
20
-
-
V
Vcc Regulation Voltage (FSD200B)
V
CCREG
-
7
-
V
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