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2001 Fairchild Semiconductor Corporation
November 2001
Rev. B, November 2001
I
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4B
IRFM214B
250V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters and
switch mode power supplies.
Features
0.64A, 250V, R
DS(on)
= 2.0
@V
GS
= 10 V
Low gate charge ( typical 8.1 nC)
Low Crss ( typical 7.5 pF)
Fast switching
Improved dv/dt capability
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S
D
G
SOT-223
IRFM Series
G
D
S
Absolute Maximum Ratings
T
C
= 25C unless otherwise noted
Thermal Characteristics
Symbol
Parameter
IRFM214B
Units
V
DSS
Drain-Source Voltage
250
V
I
D
Drain Current
- Continuous (T
C
= 25C)
0.64
A
- Continuous (T
C
= 70C)
0.51
A
I
DM
Drain Current
- Pulsed
(Note 1)
5.0
A
V
GSS
Gate-Source Voltage
30
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
45
mJ
I
AR
Avalanche Current
(Note 1)
0.64
A
E
AR
Repetitive Avalanche Energy
(Note 1)
0.21
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
5.5
V/ns
P
D
Power Dissipation (T
C
= 25C)
2.1
W
- Derate above 25C
0.017
W/C
T
J
, T
STG
Operating and Storage Temperature Range
-55 to +150
C
T
L
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
300
C
Symbol
Parameter
Typ
Max
Units
R
JA
Thermal Resistance, Junction-to-Ambient *
--
60
C
/
W
* When mounted on the minimum pad size recommended (PCB Mount)
Rev. B, November 2001
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4B
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
2001 Fairchild Semiconductor Corporation
Electrical Characteristics
T
C
= 25C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 176mH, I
AS
= 0.64A, V
DD
= 50V, R
G
= 25
,
Starting T
J
= 25C
3. I
SD
2.8A, di/dt
300A/
s, V
DD
BV
DSS,
Starting T
J
= 25C
4. Pulse Test : Pulse width
300
s, Duty cycle
2%
5. Essentially independent of operating temperature
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250
A
250
--
--
V
BV
DSS
/
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25C
--
0.26
--
V/C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 250 V, V
GS
= 0 V
--
--
10
A
V
DS
= 200 V, T
C
= 125C
--
--
100
A
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= 30 V, V
DS
= 0 V
--
--
100
nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= -30 V, V
DS
= 0 V
--
--
-100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
2.0
--
4.0
V
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 10 V, I
D
= 0.32 A
--
1.49
2.0
g
FS
Forward Transconductance
V
DS
= 40 V, I
D
= 0.32 A
--
0.95
--
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
210
275
pF
C
oss
Output Capacitance
--
35
45
pF
C
rss
Reverse Transfer Capacitance
--
7.5
10
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= 125 V, I
D
= 2.8 A,
R
G
= 25
--
6.0
22
ns
t
r
Turn-On Rise Time
--
30
70
ns
t
d(off)
Turn-Off Delay Time
--
25
60
ns
t
f
Turn-Off Fall Time
--
30
70
ns
Q
g
Total Gate Charge
V
DS
= 200 V, I
D
= 2.8 A,
V
GS
= 10 V
--
8.1
10.5
nC
Q
gs
Gate-Source Charge
--
1.4
--
nC
Q
gd
Gate-Drain Charge
--
3.5
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
--
--
0.64
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
5.0
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.64 A
--
--
1.5
V
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
S
= 2.8 A,
dI
F
/ dt = 100 A/
s
--
130
--
ns
Q
rr
Reverse Recovery Charge
--
0.49
--
C
Rev. B, November 2001
2001 Fairchild Semiconductor Corporation
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21
4B
0.0
1.5
3.0
4.5
6.0
7.5
9.0
0
2
4
6
8
10
12
V
DS
= 125V
V
DS
= 50V
V
DS
= 200V
Note : I
D
= 2.8 A
V
GS
,
G
a
t
e
-
S
ou
r
c
e V
o
l
t
age [
V
]
Q
G
, Total Gate Charge [nC]
0
2
4
6
8
0
2
4
6
8
10
V
GS
= 20V
V
GS
= 10V
Note : T
J
= 25
R
DS
(
O
N
)
[
],
D
r
ai
n-
Sour
c
e
O
n
-
R
es
i
s
t
a
nc
e
I
D
, Drain Current [A]
2
4
6
8
10
10
-1
10
0
150
o
C
25
o
C
-55
o
C
Notes :
1. V
DS
= 40V
2. 250
s Pulse Test
I
D
,
D
r
ai
n C
u
r
r
e
nt
[
A
]
V
GS
, Gate-Source Voltage [V]
10
-1
10
0
10
1
10
-1
10
0
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Bottom : 5.0 V
Notes :
1. 250
s Pulse Test
2. T
C
= 25
I
D
,
D
r
ai
n C
u
r
r
e
n
t
[
A
]
V
DS
, Drain-Source Voltage [V]
10
-1
10
0
10
1
0
100
200
300
400
500
C
oss
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
iss
C
a
pac
i
t
an
c
e
[
p
F]
V
DS
, Drain-Source Voltage [V]
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10
-1
10
0
150
Notes :
1. V
GS
= 0V
2. 250
s Pulse Test
25
I
DR
,
R
e
v
e
r
s
e D
r
ai
n C
u
r
r
e
n
t
[
A
]
V
SD
, Source-Drain voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 2. Transfer Characteristics
Figure 1. On-Region Characteristics
2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
I
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21
4B
10
-1
10
0
10
1
10
2
10
-3
10
-2
10
-1
10
0
10
1
10
s
100
s
1 ms
DC
100 ms
10 ms
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
I
D
,
D
r
ai
n C
u
r
r
e
nt
[
A
]
V
DS
, Drain-Source Voltage [V]
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
1 0
2
1 0
3
1 0
-1
1 0
0
1 0
1
1 0
2
N o te s :
1 . Z
J C
(t) = 6 0
/W M a x .
2 . D u ty F a c to r, D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
J C
(t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
JC
(
t
)
,
Ther
m
a
l
R
e
s
pon
se
t
1
, S q u a re W a v e P u ls e D u ra tio n [s e c ]
25
50
75
100
125
150
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
I
D
, D
r
a
i
n
C
u
r
r
e
n
t
[A
]
T
C
, Case Temperature [
]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. V
GS
= 10 V
2. I
D
= 0.32 A
R
DS
(
O
N
)
,
(
N
or
m
a
l
i
z
ed)
D
r
ai
n-
Sour
c
e
O
n
-
R
es
i
s
t
a
n
c
e
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
Notes :
1. V
GS
= 0 V
2. I
D
= 250
A
BV
DS
S
,
(
N
or
m
a
l
i
z
e
d)
D
r
a
i
n-
S
o
ur
c
e
B
r
ea
k
d
o
w
n
V
o
l
t
ag
e
T
J
, Junction Temperature [
o
C]
Typical Characteristics
(Continued)
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs Case Temperature
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Figure 11. Transient Thermal Response Curve
t
1
P
DM
t
2
Rev. B, November 2001
2001 Fairchild Semiconductor Corporation
I
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21
4B
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
3mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
V
GS
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
10V
V
DS
R
L
DUT
R
G
V
GS
V
GS
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
10V
V
DS
R
L
DUT
R
G
V
GS
E
AS
=
L I
AS
2
----
2
1
--------------------
BV
DSS
- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
I
D
t
p
E
AS
=
L I
AS
2
----
2
1
E
AS
=
L I
AS
2
----
2
1
----
2
1
--------------------
BV
DSS
- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
L
I
D
I
D
t
p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
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