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Электронный компонент: IRFU220A

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IRFR220, IRFU220 4.6A, 200V, 0.800 Ohm, N-Channel Power MOSFETs
background image
2002 Fairchild Semiconductor Corporation
IRFR220, IRFU220 Rev. B
IRFR220, IRFU220
4.6A, 200V, 0.800 Ohm, N-Channel Power
MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
Formerly developmental type TA9600.
Features
4.6A, 200V
r
DS(ON)
= 0.800
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 "Guidelines for Soldering Surface Mount
Components to PC Boards"
Symbol
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
Ordering Information
PART NUMBER
PACKAGE
BRAND
IRFR220
TO-252AA
IFR220
IRFU220
TO-251AA
IFU220
NOTE: When ordering, use the entire part number.
G
D
S
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
Data Sheet
January 2002
background image
2002 Fairchild Semiconductor Corporation
IRFR220, IRFU220 Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specfied
IRFR220, IRFU220
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
200
V
Drain to Gate Voltage (R
GS
= 20k
)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
200
V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
4.6
A
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
2.9
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
18
A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
20
V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
50
W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.4
W/
o
C
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
85
mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J,
T
STG
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250
A, V
GS
= 0V, (Figure 10)
200
-
-
V
Gate Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250
A
2.0
-
4.0
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= Rated BV
DSS
, V
GS
= 0V
-
-
25
A
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
J
= 125
o
C
-
-
250
A
On-State Drain Current (Note 2)
I
D(ON)
V
DS
> I
D(ON)
x r
DS(ON)MAX
, V
GS
= 10V,
(Figure 7)
4.6
-
-
A
Gate to Source Leakage Current
I
GSS
V
GS
=
20V
-
-
100
nA
Drain to Source On Resistance (Note 2)
r
DS(ON)
I
D
= 2.4A, V
GS
= 10V, (Figures 8, 9)
-
0.47
0.800
Forward Transconductance (Note 2)
g
fs
V
DS
50V, I
D
= 2.4A, (Figure 12)
1.7
2.6
-
S
Turn-On Delay Time
t
d(ON)
V
DD
=
100V, I
D
4.6A, R
GS
= 18
, R
L
= 18
,
V
GS
= 10V
MOSFET Switching Times are Essentially Indepen-
dent of Operating Temperature
-
8.8
13
ns
Rise Time
t
r
-
27
41
ns
Turn-Off Delay Time
t
d(OFF)
-
21
32
ns
Fall Time
t
f
-
14
21
ns
Total Gate Charge
(Gate to Source + Gate to Drain)
Q
g(TOT)
V
GS
= 10V, I
D
= 4.6A, V
DS
= 0.8 x Rated BV
DSS
,
I
g(REF)
= 1.5mA, (Figure 14)
Gate Charge is Essentially Independent of Operat-
ing Temperature
-
12
18
nC
Gate to Source Charge
Q
gs
-
2.3
3.4
nC
Gate to Drain "Miller" Charge
Q
gd
-
4.5
6.8
nC
Input Capacitance
C
ISS
V
DS
= 25V, V
GS
= 0V, f = 1MHz, (Figure 11)
-
330
-
pF
Output Capacitance
C
OSS
-
120
-
pF
Reverse Transfer Capacitance
C
RSS
-
41
-
pF
Internal Drain Inductance
L
D
Measured From the Drain
Lead, 6.0mm (0.25in)
From Package to Center of
Die
Modified MOSFET
Symbol Showing the
Internal Device
Inductances
-
4.5
-
nH
Internal Source Inductance
L
S
Measured From the
Source Lead, 6.0mm
(0.25in) From Package to
Source Bonding Pad
-
7.5
-
nH
Thermal Resistance, Junction to Case
R
JC
-
-
2.5
o
C/W
Thermal Resistance, Junction to Ambient
R
JA
Typical Solder Mount
-
-
110
o
C/W
L
S
L
D
G
D
S
IRFR220, IRFU220
background image
2002 Fairchild Semiconductor Corporation
IRFR220, IRFU220 Rev. B
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Continuous Source to Drain Current
I
SD
Modified MOSFET Sym-
bol Showing the Integral
Reverse P-N Junction
Rectifier
-
-
4.6
A
Pulse Source to Drain Current (Note 3)
I
SDM
-
-
18
A
Source to Drain Diode Voltage (Note 2)
V
SD
T
J
= 25
o
C, I
SD
= 4.6A, V
GS
= 0V, (Figure 13)
-
-
1.8
V
Reverse Recovery Time
t
rr
T
J
= 25
o
C, I
SD
= 4.6A, dI
SD
/dt = 100A/
s
69
170
400
ns
Reverse Recovery Charge
Q
RR
T
J
= 25
o
C, I
SD
= 4.6A, dI
SD
/dt = 100A/
s
0.30
0.72
1.8
C
NOTES:
2. Pulse test: pulse width
300
s, duty cycle
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V
DD
= 10V, starting T
J
= 25
o
C, L = 6.18mH, R
G
= 50
, peak I
AS
= 4.6A.
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
G
D
S
0
50
100
150
0
T
C
, CASE TEMPERATURE (
o
C)
PO
WER DISSIP
A
TION MUL
TIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
0
50
100
I
D
,
DRAIN CURRENT (A)
T
C
, CASE TEMPERATURE (
o
C)
150
25
75
125
5
4
3
2
1
1
0.1
10
-2
10
-5
10
-4
10
-3
10
-2
0.1
1
10
Z
JC
,
TRANSIENT
THERMAL IMPED
ANCE
t
1
, RECTANGULAR PULSE DURATION (S)
SINGLE PULSE
P
DM
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JC
+ T
C
t
1
t
2
0.1
0.02
0.2
0.5
0.01
0.05
10
IRFR220, IRFU220
background image
2002 Fairchild Semiconductor Corporation
IRFR220, IRFU220 Rev. B
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified (Continued)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10
I
D
,
DRAIN CURRENT (A)
100
100
1
10
1
0.1
BY r
DS(ON)
AREA IS LIMITED
OPERATION IN THIS
10
s
100
s
1ms
10ms
DC
SINGLE PULSE
T
J
= MAX RATED
T
C
= 25
o
C
I
D
,
DRAIN CURRENT (A)
0
20
40
60
80
2
4
6
8
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80
s
0
V
GS
= 5V
V
GS
= 4V
V
GS
= 6V
V
GS
= 7V
V
GS
= 10V
V
GS
= 8V
DUTY CYCLE = 0.5% MAX
0
2
0
1
2
3
5
4
6
I
D
,
DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
8
4
10
V
GS
= 10V
V
GS
= 5V
V
GS
= 7V
V
GS
= 6V
V
GS
= 8V
V
GS
= 4V
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
0
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
1
0.1
10
-2
I
D
,
DRAIN CURRENT (A)
T
J
= 150
o
C
T
J
= 25
o
C
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
DS
= 50V
I
D
, DRAIN CURRENT (A)
r
DS(ON)
,
DRAIN
T
O
SOURCE
5
4
3
2
1
0
0
5
10
15
20
25
V
GS
= 20V
V
GS
= 10V
ON RESIST
ANCE (S)
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN
T
O
SOURCE
3.0
1.8
1.2
0.6
0
-40
0
40
T
J
, JUNCTION TEMPERATURE (
o
C)
120
2.4
80
160
ON RESIST
ANCE
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10V, I
D
= 2.4A
IRFR220, IRFU220
background image
2002 Fairchild Semiconductor Corporation
IRFR220, IRFU220 Rev. B
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves
Unless Otherwise Specified (Continued)
NORMALIZED DRAIN
T
O
SOURCE
1.25
1.05
0.95
0.85
0.75
-40
0
40
T
J
, JUNCTION TEMPERATURE (
o
C)
120
1.15
80
I
D
= 250
A
160
BREAKDO
WN V
O
L
T
A
G
E
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C,
CAP
A
CIT
ANCE (pF)
1000
800
600
400
200
0
1
10
10
2
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
C
DS
+ C
GD
V
GS
= 0V, f = 1MHz
C
ISS
C
OSS
C
RSS
5
4
3
2
1
0
0
2
4
6
8
10
I
D
, DRAIN CURRENT (A)
g
fs
,
TRANSCONDUCT
ANCE
(S)
T
J
= 150
o
C
T
J
= 25
o
C
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
DS
= 50V
0
0.3
0.6
0.9
1.2
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
10
2
10
1
0.1
I
SD
,
SOURCE
T
O
DRAIN CURRENT (A)
T
J
= 150
o
C
T
J
= 25
o
C
1.5
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
0
2
4
6
8
10
I
D
= 4.6A
Q
g(TOT)
, TOTAL GATE CHARGE (nC)
V
GS
,
GA
TE
T
O
SOURCE (V)
20
16
12
8
4
0
V
DS
= 100V
V
DS
= 160V
V
DS
= 40V
IRFR220, IRFU220
background image
2002 Fairchild Semiconductor Corporation
IRFR220, IRFU220 Rev. B
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
V
GS
R
L
R
G
DUT
+
-
V
DD
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
0.3
F
12V
BATTERY
50k
V
DS
S
DUT
D
G
I
G(REF)
0
(ISOLATED
V
DS
0.2
F
CURRENT
REGULATOR
I
D
CURRENT
SAMPLING
I
G
CURRENT
SAMPLING
SUPPLY)
RESISTOR
RESISTOR
SAME TYPE
AS DUT
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
V
GS
V
DD
I
G(REF)
0
IRFR220, IRFU220
background image
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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