October 1987
Revised January 1999
MM74C905 12-
B
i
t Successi
ve Appr
o
x
imat
ion Regis
t
er
1999 Fairchild Semiconductor Corporation
DS005910.prf
www.fairchildsemi.com
MM74C905
12-Bit Successive Approximation Register
General Description
The MM74C905 CMOS 12-bit successive approximation
register contains all the digit control and storage necessary
for successive approximation analog-to-digital conversion.
Because of the unique capability of CMOS to switch to
each supply rail without any offset voltage, it can also be
used in digital systems as the control and storage element
in repetitive routines.
Features
s
Wide supply voltage range:
3.0V to 15V
s
Guaranteed noise margin:
1.0V
s
High noise immunity:
0.45 V
CC
(typ)
s
Low power TTL compatibility:
Fan out of 2 driving 74L
s
Provision for register extension or truncation
s
Operates in START/STOP or continuous conversion
mode
s
Drive ladder switches directly. For 10 bits or less with
50k/100k R/2R ladder network
Ordering Code:
Connection Diagram
Pin Assignments for DIP
Order Number
Package Number
Package Description
MM74C905N
N24A
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600" Wide
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2
M
M
74C905
Truth Table
H
=
HIGH Level
L
=
LOW Level
X
=
Don't Care
NC
=
No Change
Time
Inputs
Outputs
t
n
D
S
E
D0
Q11
Q10
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
CC
0
X
L
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
D11
H
L
X
L
H
H
H
H
H
H
H
H
H
H
H
H
2
D10
H
L
D11
D11
L
H
H
H
H
H
H
H
H
H
H
H
3
D9
H
L
D10
D11
D10
L
H
H
H
H
H
H
H
H
H
H
4
D8
H
L
D9
D11
D10
D9
L
H
H
H
H
H
H
H
H
H
5
D7
H
L
D8
D11
D10
D9
D8
L
H
H
H
H
H
H
H
H
6
D6
H
L
D7
D11
D10
D9
D8
D7
L
H
H
H
H
H
H
H
7
D5
H
L
D6
D11
D10
D9
D8
D7
D6
L
H
H
H
H
H
H
8
D4
H
L
D5
D11
D10
D9
D8
D7
D6
D5
L
H
H
H
H
H
9
D3
H
L
D4
D11
D10
D9
D8
D7
D6
D5
D4
L
H
H
H
H
10
D2
H
L
D3
D11
D10
D9
D8
D7
D6
D5
D4
D3
L
H
H
H
11
D1
H
L
D2
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
L
H
H
12
D0
H
L
D1
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
L
H
13
X
H
L
D0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
L
14
X
X
L
X
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
L
X
X
H
X
H
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
3
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MM74C905
Absolute Maximum Ratings
(Note 1)
Note 1: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed. Except for "Operating Tempera-
ture Range" they are not meant to imply that the devices should be oper-
ated at these limits. The table of "Electrical Characteristics" provides
conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Voltage at Any Pin
-
0.3V to V
CC
+
0.3V
Operating Temperature Range (T
A
)
-
40
C to
+
85
C
Storage Temperature Range (T
S
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Operating V
CC
Range
3.0V to 15V
Absolute Maximum V
CC
16V
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
V
IN(1)
Logical "1" Input Voltage
V
CC
=
5.0V
3.5
V
V
CC
=
10V
8.0
V
V
IN(0)
Logical "0" Input Voltage
V
CC
=
5.0V
1.5
V
V
CC
=
10V
2.0
V
V
OUT(1)
Logical "1" Output Voltage
V
CC
=
5.0V, I
O
=
-
10
A
4.5
V
V
CC
=
10V, I
O
=
-
10
A
9.0
V
V
OUT(0)
Logical "0" Output Voltage
V
CC
=
5.0V, I
O
=
10
A
0.5
V
V
CC
=
10V, I
O
=
10
A
1.0
V
I
IN(1)
Logical "1" Input Current
V
CC
=
15V, V
IN
=
15V
0.005
1.0
A
I
IN(0)
Logical "0" Input Current
V
CC
=
15V, V
IN
=
0V
-
1.0
-
0.005
A
I
CC
Supply Current
V
CC
=
15V
0.05
300
A
CMOS/LPTTL INTERFACE
V
IN(1)
Logical "1" Input Voltage
V
CC
=
4.75V
V
CC
-
1.5
V
V
IN(0)
Logical "0" Input Voltage
V
CC
=
4.75V
0.8
V
V
OUT(1)
Logical "1" Output Voltage
V
CC
=
4.75V, I
O
=
-
360
A
2.4
V
V
OUT(0)
Logical "0" Output Voltage
V
CC
=
4.75V, I
O
=
360
A
0.4
V
OUTPUT DRIVE (See Family Characteristics Data Sheet)
I
SOURCE
Output Source Current
V
CC
=
5.0V, V
OUT
=
0V
-
1.75
-
3.3
mA
(P-Channel)
T
A
=
25
C
I
SOURCE
Output Source Current
V
CC
=
10V, V
OUT
=
0V
-
8.0
-
15
mA
(P-Channel)
T
A
=
25
C
I
SINK
Output Sink Current
V
CC
=
5.0V, V
OUT
=
V
CC
1.75
3.6
mA
(N-Channel)
T
A
=
25
C
I
SINK
Output Sink Current
V
CC
=
10V, V
OUT
=
V
CC
(N-Channel)
T
A
=
25
C
8.0
16
mA
V
CC
=
10V
5%
R
SOURCE
Q11Q0 Outputs
V
OUT
=
V
CC
-
0.3V
150
350
T
A
=
25
C
R
SINK
Q11Q0 Outputs
V
CC
=
10V
5%
V
OUT
=
0.3V
80
230
T
A
=
25
C
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4
M
M
74C905
AC Electrical Characteristics
(Note 2)
T
A
=
25
C, C
L
=
50 pF, unless otherwise specified
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: C
PD
determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics Application Note--
AN-90.
Typical Performance Characteristics
R
SINK
vs Temperature
These points are guaranteed by automatic testing.
R
SOURCE
vs Temperature
These points are guaranteed by automatic testing.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
pd
Propagation Delay Time from
V
CC
=
5.0V
200
350
ns
Clock Input to Outputs
V
CC
=
10V
80
150
ns
(Q0Q11) (t
pd(Q)
)
t
pd
Propagation Delay Time from
V
CC
=
5.0V
180
325
ns
Clock Input to D0 (t
pd(D0)
)
V
CC
=
10V
70
125
ns
t
pd
Propagation Delay Time from
V
CC
=
5.0V
190
350
ns
Register Enable (E) to Output
V
CC
=
10V
75
150
ns
(Q11) (t
pd(E)
)
t
pd
Propagation Delay Time from
V
CC
=
5.0V
190
350
ns
Clock to CC (t
pd(CC)
)
V
CC
=
10V
75
0.50
ns
t
S
Data Input Set-Up Time
V
CC
=
5.0V
80
ns
V
CC
=
10V
30
ns
t
S
Start Input Set-Up Time
V
CC
=
5.0V
80
ns
V
CC
=
10V
30
ns
t
W
Minimum Clock Pulse Width
V
CC
=
5.0V
250
125
ns
V
CC
=
10V
100
50
ns
t
r
, t
f
Maximum Clock Rise and Fall Time
V
CC
=
5.0V
15
s
V
CC
=
10V
5.0
s
f
MAX
Maximum Clock Frequency
V
CC
=
5.0V
2.0
4.0
MHz
V
CC
=
10V
5.0
10
MHz
C
CK
Clock Input Capacitance
Clock Input (Note 3)
10
pF
C
IN
Input Capacitance
Any other Input (Note 3)
5
pF
C
PD
Power Dissipation Capacitance
(Note 4)
100
pF
5
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MM74C905
Timing Diagram
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