2000 Fairchild Semiconductor Corporation
DS005355
www.fairchildsemi.com
August 1984
Revised January 2000
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MM74HC4066
Quad Analog Switch
General Description
The MM74HC4066 devices are digitally controlled analog
switches utilizing advanced silicon-gate CMOS technology.
These switches have low "ON" resistance and low "OFF"
leakages. They are bidirectional switches, thus any analog
input may be used as an output and visa-versa. Also the
MM74HC4066 switches contain linearization circuitry
which lowers the "ON" resistance and increases switch lin-
earity. The MM74HC4066 devices allow control of up to
12V (peak) analog signals with digital control signals of the
same range. Each switch has its own control input which
disables each switch when LOW. All analog inputs and out-
puts and digital inputs are protected from electrostatic
damage by diodes to V
CC
and ground.
Features
s
Typical switch enable time: 15 ns
s
Wide analog input voltage range: 012V
s
Low "ON" resistance: 30 typ. (MM74HC4066)
s
Low quiescent current: 80
A maximum (74HC)
s
Matched switch characteristics
s
Individual switch controls
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Schematic Diagram
Connection Diagram
Top View
Truth Table
Order Number
Package Number
Package Description
MM74HC4066M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
MM74HC4066SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4066MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC4066N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Input
Switch
CTL
I/OO/I
L
"OFF"
H
"ON"
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Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating -- plastic "N" package:
-
12 mW/
C from 65
C to 85
C.
DC Electrical Characteristics
(Note 4)
Note 4: For a power supply of 5V
10% the worst case on resistance (R
ON
) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with
this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage current occurs for
CMOS at the higher voltage and so the 5.5V values should be used.
Note 5: At supply voltages (V
CC
GND) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.
Supply Voltage (V
CC
)
-
0.5 to
+
15V
DC Control Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Switch I/O Voltage (V
IO
)
V
EE
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
20 mA
DC Output Current, per pin (I
OUT
)
25 mA
DC V
CC
or GND Current, per pin (I
CC
)
50 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
C
Min
Max
Units
Supply Voltage (V
CC
)
2
12
V
DC Input or Output Voltage
(V
IN
, V
OUT
)
0
V
CC
V
Operating Temperature Range (T
A
)
-
40
+
85
C
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
1000
ns
V
CC
=
4.5V
500
ns
V
CC
=
9.0V
400
ns
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-
55 to 125
C
Units
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
2.0V
1.5
1.5
1.5
V
Input Voltage
4.5V
3.15
3.15
3.15
V
9.0V
6.3
5.3
6.3
V
12.0V
8.4
8.4
8.4
V
V
IL
Maximum LOW Level
2.0V
0.5
0.5
0.5
V
Input Voltage
4.5V
1.35
1.35
1.35
V
9.0V
2.7
2.7
2.7
V
12.0V
3.6
3.6
3.6
V
R
ON
Maximum "ON" Resistance
V
CTL
=
V
IH
, I
S
=
2.0 mA
4.5V
100
170
200
220
(Note 5)
V
IS
=
V
CC
to GND
9.0V
50
85
105
110
(Figure 1)
12.0
30
70
85
90
2.0V
120
180
215
240
V
CTL
=
V
IH
, I
S
=
2.0 mA
4.5V
50
80
100
120
V
IS
=
V
CC
or GND
9.0V
35
60
75
80
(Figure 1)
12.0V
20
40
60
70
R
ON
Maximum "ON" Resistance
V
CTL
=
V
IH
4.5V
10
15
20
20
Matching
V
IS
=
V
CC
to GND
9.0V
5
10
15
15
12.0V
5
10
15
15
I
IN
Maximum Control
V
IN
=
V
CC
or GND
0.1
1.0
1.0
A
Input Current
V
CC
=
2
-
6V
I
IZ
Maximum Switch "OFF"
V
OS
=
V
CC
or GND
6.0V
10
60
600
600
nA
Leakage Current
V
IS
=
GND or V
CC
9.0V
15
80
800
800
nA
V
CTL
=
V
IL
(Figure 3)
12.0V
20
100
1000
1000
nA
I
IZ
Maximum Switch "ON"
V
IS
=
V
CC
to GND
6.0V
10
40
150
150
nA
Leakage Current
V
CTL
=
V
IH
9.0V
15
50
200
200
nA
V
OS
=
OPEN (Figure 2)
12.0V
20
60
300
300
nA
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND
6.0V
2.0
20
40
A
Supply Current
I
OUT
=
0
A
9.0V
4.0
40
80
A
12.0V
8.0
80
160
A
3
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74H
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AC Electrical Characteristics
V
CC
= 2.0V
-
6.0V V
EE
= 0V
-
12V, C
L
= 50 pF (unless otherwise specified)
Note 6: Adjust 0 dBm for F
=
1 kHz (Null R
L
/R
ON
Attenuation).
Note 7: V
IS
is centered at V
CC
/2.
Note 8: Adjust input for 0 dBm.
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-
55 to 125
C
Units
Typ
Guaranteed Limits
t
PHL
, t
PLH
Maximum Propagation
2.0V
25
50
30
75
ns
Delay Switch In to Out
4.5V
5
10
13
15
ns
9.0V
4
8
10
12
ns
12.0V
3
7
11
13
ns
t
PZL
, t
PZH
Maximum Switch Turn
R
L
=
1 k
2.0V
30
100
125
150
ns
"ON" Delay
4.5V
12
20
25
30
ns
9.0V
6
12
15
18
ns
12.0V
5
10
13
15
ns
t
PHZ
, t
PLZ
Maximum Switch Turn
R
L
=
1 k
2.0V
60
168
210
252
ns
"OFF" Delay
4.5V
25
36
45
54
ns
9.0V
20
32
40
48
ns
12.0V
15
30
38
45
f
MAX
Minimum Frequency
R
L
=
600
4.5V
40
MHz
Response (Figure 7)
V
IS
=
2 V
PP
at (V
CC
/2)
9.0V
100
MHz
20 log (V
O
/V
I
)
=
-
3 dB
(Note 6) (Note 7)
Crosstalk Between
R
L
=
600
, F
=
1 MHz
any Two Switches
(Note 7) (Note 8)
4.5V
-
52
dB
(Figure 8)
9.0V
-
50
dB
Peak Control to Switch
R
L
=
600
, F
=
1 MHz
4.5V
100
mV
Feedthrough Noise (Figure 9)
C
L
=
50 pF
9.0V
250
mV
Switch OFF Signal
R
L
=
600
, F
=
1 MHz
Feedthrough
V
(CT)
V
IL
Isolation
(Note 7) (Note 8)
4.5V
-
42
dB
(Figure 10)
9.0V
-
44
dB
THD
Total Harmonic
R
L
=
10 k
, C
L
=
50 pF,
Distortion
F
=
1 kHz
(Figure 11)
V
IS
=
4 V
PP
4.5V
.013
%
V
IS
=
8 V
PP
9.0V
.008
%
C
IN
Maximum Control
5
10
10
10
pF
Input Capacitance
C
IN
Maximum Switch
20
pF
Input Capacitance
C
IN
Maximum Feedthrough
V
CTL
=
GND
0.5
pF
Capacitance
C
PD
Power Dissipation
15
pF
Capacitance
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AC Test Circuits and Switching Time Waveforms
FIGURE 1. "ON" Resistance
FIGURE 2. "ON" Channel Leakage Current
FIGURE 3. "OFF" Channel Leakage Current
FIGURE 4. t
PHL
, t
PLH
Propagation Delay Time Signal Input to Signal Output
FIGURE 5. t
PZL
, t
PLZ
Propagation Delay Time Control to Signal Output
FIGURE 6. t
PZH
, t
PHZ
Propagation Delay Time Control to Signal Output
5
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AC Test Circuits and Switching Time Waveforms
(Continued)
FIGURE 7. Frequency Response
FIGURE 8. Crosstalk: Control Input to Signal Output
FIGURE 9. Crosstalk Between Any Two Switches
FIGURE 10. Switch OFF Signal Feedthrough Isolation
FIGURE 11. Sinewave Distortion
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