September 1983
Revised April 1999
MM74HCT14
Hex I
nvert
i
ng Schmit
t
T
r
igger
1999 Fairchild Semiconductor Corporation
DS500059.prf
www.fairchildsemi.com
MM74HCT14
Hex Inverting Schmitt Trigger
General Description
The MM74HCT14 utilizes advanced silicon-gate CMOS
technology to achieve the low power dissipation and high
noise immunity of standard CMOS, as well as the capability
to drive 10 LS-TTL loads.
The 74HCT logic family is functionally and pinout compati-
ble with the standard 74LS logic family. All inputs are pro-
tected from damage due to static discharge by internal
diode clamps to V
CC
and ground.
Features
s
Typical propagation delay: 13 ns
s
Wide power supply range: 26V
s
Low quiescent current: 10
A maximum
s
Low input current: 1
A maximum
s
Fanout of 10 LS-TTL loads
s
Typical hysteresis voltage: 0.9V at V
CC
=
4.5V
s
TTL, LS pin-out and input threshold compatible
Ordering Codes:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Schematic Diagram
Order Number
Package Number
Package Description
MM74HCT14M M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
MM74HCT14SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCT14MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCT14N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com
2
MM
74
H
C
T14
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
DC Electrical Characteristics
(Note 3)
Note 3: For a power supply of 5V
10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
Supply Voltage (V
CC
)
-
0.5 to
+
7.0V
DC Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Output Voltage (V
OUT
)
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
20 mA
DC Output Current, per pin (I
OUT
)
25 mA
DC V
CC
or GND Current, per pin (I
CC
)
50 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
C
Min
Max
Units
Supply Voltage (V
CC
)
2
6
V
DC Input or Output Voltage
(V
IN
, V
OUT
)
0
V
CC
V
Operating Temperature Range (T
A
)
-
40
+
85
C
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40 to 85
C
Units
Typ
Guaranteed Limits
V
T
+
Positive Going
Minimum
4.5V
1.5
1.2
1.2
V
Threshold Voltage
5.5V
1.7
1.4
1.4
V
Maximum
4.5V
1.5
1.9
1.9
V
5.5V
1.7
2.1
2.1
V
V
T
-
Negative Going
Minimum
4.5V
0.9
0.5
0.5
V
Threshold Voltage
5.5V
1.0
0.6
0.6
V
Maximum
4.5V
0.9
1.2
1.2
V
5.5V
1.0
1.4
1.4
V
V
H
Hysteresis Voltage
Minimum
4.5V
0.6
0.4
0.4
V
5.5V
0.7
0.4
0.4
V
Maximum
4.5V
0.6
1.4
1.4
V
5.5V
0.7
1.5
1.5
V
V
OH
Minimum HIGH Level
V
IN
=
V
IL
Output Voltage
|I
OUT
|
=
20
A
V
CC
V
CC
-
0.1
V
CC
-
0.1
V
|I
OUT
|
=
4.0 mA, V
CC
=
4.5V
4.2
3.98
3.84
V
|I
OUT
|
=
4.8 mA, V
CC
=
5.5V
5.2
4.98
4.98
V
V
OL
Maximum LOW Level
V
IN
=
V
IH
Voltage
|I
OUT
|
=
20
A
0
0.1
0.1
V
|I
OUT
|
=
4.0 mA, V
CC
=
4.5V
0.2
0.26
0.33
V
|I
OUT
|
=
4.8 mA, V
CC
=
5.5V
0.2
0.26
0.33
V
I
IN
Maximum Input Current
V
IN
=
V
CC
or GND
0.1
1.0
A
V
IH
or V
IL
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND
5.5V
1.0
10
A
Supply Current
I
OUT
=
0
A
V
IN
=
2.4V or 0.5V (Note 3)
5.5V
2.4
2.4
mA
3
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MM74HCT14
AC Electrical Characteristics
V
CC
=
5V, T
A
=
25
C, C
L
=
15 pF, t
r
=
t
f
=
6 ns
AC Electrical Characteristics
V
CC
=
5V
10%, C
L
=
50 pF, t
r
=
t
f
=
6 ns (unless otherwise specified)
Note 4: C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC
2 f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
Typical Performance Characteristics
Input Threshold, V
T
+
, V
T
-
,
vs Power Supply Voltage
Propagation Delay vs
Power Supply
Typical Applications
Low Power Oscillator
Note: The equations assume t
1
+
t
2
>>
t
pd0
+
t
pd1
Symbol
Parameter
Conditions
Typ
Guaranteed
Limit
Units
t
PHL
, t
PLH
Maximum Propagation Delay
10
18
ns
Symbol
Parameter
Conditions
T
A
=
25
T
A
=
-
40 to 85
C
Units
Typ
Guaranteed Limits
t
PHL
, t
PLH
Maximum Propagation Delay
20
25
ns
t
TLH
, t
THL
Maximum Output Rise and Fall Time
9
15
19
ns
C
PD
Power Dissipation
(per gate)
25
pF
Capacitance (Note 4)
C
IN
Maximum Input Capacitance
5
10
10
pF
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4
MM
74
H
C
T14
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
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MM74HCT14
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
MM74HCT14
H
e
x I
nvert
i
n
g
Schmit
t
T
r
i
gger
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
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