2000 Fairchild Semiconductor Corporation
DS012140
www.fairchildsemi.com
October 1995
Revised June 2000
NC7S02 T
i
nyLo
gic
HS
2-
Inpu
t N
O
R G
a
te
NC7S02
TinyLogic
HS 2-Input NOR Gate
General Description
The NC7S02 is a single 2-Input high performance CMOS
NOR Gate. Advanced Silicon Gate CMOS fabrication
assures high speed and low power circuit operation over a
broad V
CC
range. ESD protection diodes inherently guard
both inputs and output with respect to the V
CC
and GND
rails. Three stages of gain between inputs and outputs
assures high noise immunity and reduced sensitivity to
input edge rate.
Features
s
Space saving SOT23 or SC70 5-lead packages
s
High Speed; t
PD
3.5 ns typ
s
Low Quiescent Power; I
CC
<
1
A
s
Balanced Output Drive; 2 mA I
OL
,
-
2 mA I
OH
s
Broad V
CC
Operating Range; 2V6V
s
Balanced Propagation Delays
s
Specified for 3V operation
Ordering Code:
Logic Symbol
IEEE/IEC
Connection Diagram
(Top View)
Pin Descriptions
Function Table
H
=
HIGH Logic Level
L
=
LOW Logic Level
TinyLogic
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Product
Code
Package Description
Supplied As
Number
Top Mark
NC7S02M5
MA05B
7S02
5-Lead SOT23, JEDEC MO-178, 1.6mm
250 Units on Tape and Reel
NC7S02M5X
MA05B
7S02
5-Lead SOT23, JEDEC MO-178, 1.6mm
3k Units on Tape and Reel
NC7S02P5
MAA05A
S02
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
250 Units on Tape and Reel
NC7S02P5X
MAA05A
S02
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
3k Units on Tape and Reel
Pin Names
Description
A, B
Inputs
Y
Output
Y
=
A + B
Inputs
Output
A
B
Y
L
L
H
L
H
L
H
L
L
H
H
L
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2
N
C
7S02
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
(Note 2)
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of circuits outside databook specifications.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
@ V
IN
-
0.5V
-
20 mA
@ V
IN
V
CC
+
0.5V
+
20 mA
DC Input Voltage (V
IN
)
-
0.5V to V
CC
+
0.5V
DC Output Diode Current (I
OK
)
@ V
OUT
<
-
0.5V
-
20 mA
@ V
OUT
>
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
OUT
)
-
0.5V to V
CC
+
0.5V
DC Output Source
or Sink Current (I
OUT
)
12.5 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
25 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Junction Temperature (T
J
)
150
C
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
Power Dissipation (P
D
) @
+
85
C
SOT23-5
200 mW
SC70-5
150 mW
Supply Voltage (V
CC
)
2.0V to 6.0V
Input Voltage (V
IN
)
0V to V
CC
Output Voltage (V
OUT
)
0V to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Input Rise and Fall Time (t
r
, t
f
)
V
CC
@ 2.0V
0 to 1000 ns
V
CC
@ 3.0V
0 to 750 ns
V
CC
@ 4.5V
0 to 500 ns
V
CC
@ 6.0V
0 to 400 ns
Thermal Resistance (
JA
)
SOT23-5
300
C/W
SC70-5
425
C/W
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Min
Typ
Max
Min
Max
V
IH
HIGH Level Input Voltage
2.0
1.50
1.50
V
3.0-6.0
0.7 V
CC
0.7 V
CC
V
IL
LOW Level Input Voltage
2.0
0.50
0.50
V
3.0-6.0
0.3 V
CC
0.3 V
CC
V
OH
HIGH Level Output Voltage
2.0
1.90
2.0
1.90
V
I
OH
=
-
20
A
3.0
2.90
3.0
2.90
4.5
4.40
4.5
4.40
V
IN
=
V
IL
6.0
5.90
6.0
5.90
V
V
IN
=
V
IL
3.0
2.68
2.85
2.63
I
OH
=
-
1.3 mA
4.5
4.18
4.35
4.13
I
OH
=
-
2 mA
6.0
5.68
5.85
5.63
I
OH
=
-
2.6 mA
V
OL
LOW Level Output Voltage
2.0
0.0
0.10
0.10
V
I
OL
=
20
A
3.0
0.0
0.10
0.10
4.5
0.0
0.10
0.10
V
IN
=
V
IH
6.0
0.0
0.10
0.10
V
V
IN
=
V
IH
3.0
0.1
0.26
0.33
I
OL
=
1.3 mA
4.5
0.1
0.26
0.33
I
OL
=
2 mA
6.0
0.1
0.26
0.33
I
OL
=
2.6 mA
I
IN
Input Leakage Current
6.0
0.1
1.0
A
V
IN
=
V
CC
, GND
I
CC
Quiescent Supply Current
6.0
1.0
10.0
A
V
IN
=
V
CC
, GND
3
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NC7S02
AC Electrical Characteristics
Note 3: C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
CCD
) at no output
loading and operating at 50% duty cycle. (See Figure 2.) C
PD
is related to I
CCD
dynamic operating current by the expression:
I
CCD
=
(C
PD
)(V
CC
)(f
IN
)
+
(I
CC
static).
AC Loading and Waveforms
C
L
includes load and stray capacitance
Input PRR
=
1.0 MHz; t
w
=
500 ns
FIGURE 1. AC Test Circuit
Input
=
AC Waveform;
PRR
=
variable; Duty Cycle
=
50%
FIGURE 2. I
CCD
Test Circuit
FIGURE 3. AC Waveforms
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
Fig. No.
(V)
Min
Typ
Max
Min
Max
t
PLH
,
Propagation Delay
5.0
3.5
15
ns
C
L
=
15 pF
Figures
1, 3
t
PHL
2.0
19
100
125
C
L
=
50 pF
3.0
10.5
27
35
ns
4.5
7.5
20
25
6.0
6.5
17
21
t
TLH
,
Output Transition Time
5.0
3
10
ns
C
L
=
15 pF
Figures
1, 3
t
THL
2.0
25
125
155
C
L
=
50 pF
3.0
16
35
45
ns
4.5
11
25
31
6.0
9
21
26
C
IN
Input Capacitance
Open
2
10
10
pF
C
PD
Power Dissipation Capacitance
5.0
6
pF
(Note 3)
Figure 2
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