June 1996
NDP7061L / NDB7061L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
________________________________________________________________________________
Absolute Maximum Ratings
T
C
= 25C unless otherwise noted
Symbol
Parameter
NDP7061L
NDB7061L
Units
V
DSS
Drain-Source Voltage
60
V
V
DGR
Drain-Gate Voltage (R
GS
< 1 M
)
60
V
V
GSS
Gate-Source Voltage - Continuous
16
V
- Nonrepetitive (t
P
< 50 s)
25
I
D
Drain Current
- Continuous
60
A
- Pulsed
180
P
D
Maximum Power Dissipation @ T
C
= 25C
130
W
Derate above 25C
0.87
W/C
T
J
,T
STG
Operating and Storage Temperature Range
-65 to 175
C
NDP7061L Rev.C1
60 A, 60 V. R
DS(ON)
= 0.018
@ V
GS
= 5 V
R
DS(ON)
= 0.013
@ V
GS
= 10 V.
Low drive requirements allowing operation directly from logic
drivers. V
GS(TH)
< 2.0V.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175C maximum junction temperature rating.
High density cell design for extremely low R
DS(ON)
.
TO-220 and TO-263 (D
2
PAK) package for both through hole
and surface mount applications.
S
D
G
These logic level N-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
1997 Fairchild Semiconductor Corporation
Electrical Characteristics
(T
C
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE AVALANCHE RATINGS
(Note 1)
W
DSS
Single Pulse Drain-Source Avalanche
Energy
V
DD
= 30 V, I
D
=60 A
500
mJ
I
AR
Maximum Drain-Source Avalanche Current
60
A
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 A
60
V
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 48 V, V
GS
= 0 V
10
A
T
J
= 125C
1
mA
I
GSSF
Gate - Body Leakage, Forward
V
GS
= 16 V, V
DS
= 0 V
100
nA
I
GSSR
Gate - Body Leakage, Reverse
V
GS
= -16 V, V
DS
= 0 V
-100
nA
ON CHARACTERISTICS
(Note 1)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
1
1.2
2
V
T
J
= 125C
0.65
0.7
1.5
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= 5 V, I
D
= 30 A
0.013
0.018
T
J
= 125C
0.023
0.032
V
GS
= 10 V, I
D
= 30 A
0.011
0.013
I
D(on)
On-State Drain Current
V
GS
= 5 V, V
DS
= 10 V
60
A
g
FS
Forward Transconductance
V
DS
= 10 V, I
D
= 30 A
45
S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= 30 V, V
GS
= 0 V,
f = 1.0 MHz
2600
pF
C
oss
Output Capacitance
690
pF
C
rss
Reverse Transfer Capacitance
220
pF
SWITCHING CHARACTERISTICS
(Note 1)
t
D(on)
Turn - On Delay Time
V
DD
= 30 V, I
D
= 60A,
V
GS
= 5 V, R
GEN
= 10
R
GS
= 10
18
35
nS
t
r
Turn - On Rise Time
430
600
nS
t
D(off)
Turn - Off Delay Time
63
120
nS
t
f
Turn - Off Fall Time
240
400
nS
Q
g
Total Gate Charge
V
DS
= 12 V
I
D
= 60 A , V
GS
= 5 V
52
75
nC
Q
gs
Gate-Source Charge
9
nC
Q
gd
Gate-Drain Charge
28
nC
NDP7061L Rev.C1
Electrical Characteristics
(T
C
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
Maximum Continuos Drain-Source Diode Forward Current
60
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
180
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 30 A (
Note 1)
0.9
1.3
V
T
J
= 125C
0.8
1.2
V
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
F
= 60A,
dI
F
/dt = 100 A/s
40
150
ns
I
rr
Reverse Recovery Current
2
10
A
THERMAL CHARACTERISTICS
R
JC
Thermal Resistance, Junction-to-Case
1.15
C/W
R
JA
Thermal Resistance, Junction-to-Ambient
62.5
C/W
Note:
1. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%.
NDP7061L Rev.C1
NDP7061L Rev.C1
Typical Electrical Characteristics
0
1
2
3
4
5
0
20
40
60
80
100
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
V = 10V
GS
DS
D
3.0
2.5
3.5
4.0
5.0
6.0
4.5
Figure 1. On-Region Characteristics
.
-50
-25
0
25
50
75
100
125
150
175
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE ON-RESISTANCE
J
V = 10V
GS
I = 30A
D
R , NORMALIZED
DS(ON)
Figure 3. On-Resistance Variation
with Temperature
.
0
1
2
3
4
0
10
20
30
40
50
60
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
25C
125C
V = 10V
DS
GS
D
T = -55C
J
Figure 5. Transfer Characteristics
.
0
20
40
60
80
100
0.6
0.8
1
1.2
1.4
1.6
1.8
2
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
D
R , NORMALIZED
DS(on)
V =3.0V
GS
4.5
5.0
3.5
4.0
10
6.0
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage
.
0
20
40
60
80
100
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 5V
GS
T = 125C
J
25C
-55C
D
R , NORMALIZED
DS(on)
Figure 4. On-Resistance Variation
with Drain Current and Temperature
.
-50
-25
0
25
50
75
100
125
150
175
0.2
0.4
0.6
0.8
1
1.2
1.4
T , JUNCTION TEMPERATURE (C)
GATE-SOURCE THRESHOLD VOLTAGE
J
V , NORMALIZED
GS(th)
I = 250A
D
V = V
GS
DS
Figure 6. Gate Threshold Variation
with Temperature
.
NDP7061L Rev.C1
Typical Electrical Characteristics
(continued)
-50
-25
0
25
50
75
100
125
150
175
0.9
0.95
1
1.05
1.1
1.15
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE BREAKDOWN VOLTAGE
BV , NORMALIZED
DSS
J
I = 250A
D
Figure 7. Breakdown Voltage
Variation with Temperature
.
1
2
5
10
20
30
50 60
100
200
300
500
1000
2000
3000
5000
V , DRAIN TO SOURCE VOLTAGE (V)
C
A
P
ACITANCE (pF)
DS
f = 1 MHz
V = 0V
GS
C
oss
C
iss
C
rss
Figure 9. Capacitance Characteristics
.
0
0.2
0.4
0.6
0.8
1
1.2
0.0001
0.001
0.01
0.1
1
5
20
60
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
V = 0V
GS
T = 125C
J
-55C
SD
S
25C
Figure 8. Body Diode Forward Voltage Variation with
Current and Temperature
.
0
20
40
60
80
100
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
48V
I =60A
D
V = 12V
DS
24V
Figure 10. Gate Charge Characteristics.
G
D
S
V
DD
R
GS
R
L
V
OUT
V
IN
DUT
R
V
GEN
GEN
Figure 11. Switching Test Circuit
.
Figure 12. Switching Waveforms
.
1 0 %
5 0 %
9 0 %
1 0 %
9 0 %
9 0 %
5 0 %
V
IN
V
O U T
o n
off
d(off)
f
r
d(on)
t
t
t
t
t
t
INVERTED
1 0 %
PULSE W IDTH
PDF 
ZIP