March 1996
NDC7001C
Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
____________________________________________________________________________________________
Absolute Maximum Ratings
T
A
= 25C unless otherwise noted
Symbol
Parameter
N-Channel
P-Channel
Units
V
DSS
Drain-Source Voltage
50
-50
V
V
GSS
Gate-Source Voltage - Continuous
20
-20
V
I
D
Drain Current - Continuous
(Note 1a)
0.51
-0.34
A
- Pulsed
1.5
-1
P
D
Maximum Power Dissipation
(Note 1a)
0.96
W
(Note 1b)
0.9
(Note 1c)
0.7
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
C
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
130
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
60
C/W
NDC7001C.SAM
These dual N and P-channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been designed to minimize on-state resistance,
provide rugged and reliable performance and fast switching.
These devices is particularly suited for low voltage, low
current, switching, and power supply applications.
N-Channel 0.51A, 50V, R
DS(ON)
= 2
@ V
GS
=10V
P-Channel -0.34A, -50V. R
DS(ON)
= 5
@ V
GS
=-10V.
High density cell design for low R
DS(ON)
.
Proprietary SuperSOT
TM
-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High saturation current
.
1
5
4
6
3
2
SuperSOT
TM
-6
1997 Fairchild Semiconductor Corporation
ELECTRICAL CHARACTERISTICS
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Type
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 A
N-Ch
50
V
V
GS
= 0 V, I
D
= -250 A
P-Ch
-50
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 40 V, V
GS
= 0 V
N-Ch
1
A
T
J
= 125C
500
V
DS
= -40 V, V
GS
= 0 V
P-Ch
-1
T
J
= 125C
-500
I
GSSF
Gate - Body Leakage, Forward
V
GS
= 20 V, V
DS
= 0 V
All
100
nA
I
GSSR
Gate - Body Leakage, Reverse
V
GS
= -20 V, V
DS
= 0 V
All
-100
nA
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
N-Ch
1
1.9
2.5
V
T
J
= 125C
0.8
1.5
2.2
V
DS
= V
GS
, I
D
= -250 .A
P-Ch
-1
-2.5
-3.5
T
J
= 125C
-0.8
-2.2
-3
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= 10 V, I
D
= 0.51 A
N-Ch
1
2
T
J
= 125C
1.7
3.5
V
GS
= 4.5 V, I
D
= 0.35 A
1.6
4
V
GS
= -10 V, I
D
= -0.34 A
P-Ch
2.5
5
T
J
= 125C
4
10
V
GS
= -4.5 V, I
D
= -0.25 A
5.3
7.5
I
D(on)
On-State Drain Current
V
GS
= 10 V, V
DS
= 10 V
N-Ch
1.5
A
V
GS
= -10 V, V
DS
= -10 V
P-Ch
-1
g
FS
Forward Transconductance
V
DS
= 10 V, I
D
= 0.51 A
N-Ch
400
mS
V
DS
= -10 V, I
D
= -0.34 A
P-Ch
250
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
N-Channel
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
P-Channel
V
DS
= -25 V, V
GS
= 0 V,
f = 1.0 MHz
N-Ch
20
pF
P-Ch
40
C
oss
Output Capacitance
N-Ch
13
pF
P-Ch
13
C
rss
Reverse Transfer Capacitance
N-Ch
5
pF
P-Ch
4
NDC7001C.SAM
Electrical Characteristics
(T
A
= 25
o
C unless otherwise noted)
Symbol
Parameters
Conditions
Type Min
Typ
Max
Units
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
N-Channel
V
DD
= 25 V, I
D
= 0.25 A,
V
GS
= 10 V, R
GEN
= 25
P-Channel
V
DD
= -25 V, I
D
= -0.25 A,
V
GS
= -10 V, R
GEN
= 25
N-Ch
6
20
nS
P-Ch
14
20
t
r
Turn - On Rise Time
N-Ch
6
20
P-Ch
6
20
t
D(off)
Turn - Off Delay Time
N-Ch
11
20
P-Ch
13
20
t
f
Turn - Off Fall Time
N-Ch
5
20
P-Ch
6
20
Q
g
Total Gate Charge
N-Channel
V
DS
= 25 V,
I
D
= 0.51 A, V
GS
= 10 V
P-Channel
V
DS
= -25 V,
I
D
= -0.34 A, V
GS
= -10 V
N-Ch
1
nC
P-Ch
1.3
Q
gs
Gate-Source Charge
N-Ch
0.19
nC
P-Ch
0.23
Q
gd
Gate-Drain Charge
N-Ch
0.33
nC
P-Ch
0.38
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
Maximum Continuous Source Current
N-Ch
0.51
A
P-Ch
-0.34
I
SM
Maximum Pulse Source Current
(Note 2)
N-Ch
1.5
A
P-Ch
-1
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.51 A
(Note 2)
N-Ch
0.8
1.2
V
V
GS
= 0 V, I
S
= -0.34 A
(Note 2)
P-Ch
-0.8
-1.2
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JC
is guaranteed by
design while R
CA
is determined by the user's board design.
P
D
(
t
) =
T
J
-
T
A
R
JA
(
t
)
=
T
J
-
T
A
R
JC
+
R
CA
(
t
)
=
I
D
2
(
t
)
R
DS
(
ON
)
T
J
Typical R
JA
for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 130
o
C/W when mounted on a 0.125 in
2
pad of 2oz cpper.
b. 140
o
C/W when mounted on a 0.005 in
2
pad of 2oz cpper.
c. 180
o
C/W when mounted on a 0.0015 in
2
pad of 2oz cpper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDC7001C.SAM
1a
1b
1c
NDC7001C.SAM
0
1
2
3
4
5
0
0.3
0.6
0.9
1.2
1.5
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
6.0
V =10V
GS
DS
D
8.0 7.0
3.5
4.0
4.5
5.0
5.5
3.0
-50
-25
0
25
50
75
100
125
150
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE ON-RESISTANCE
J
V = 10V
GS
I = 0.51A
D
R , NORMALIZED
DS(ON)
-50
-25
0
25
50
75
100
125
150
0.7
0.8
0.9
1
1.1
1.2
T , JUNCTION TEMPERATURE (C)
GATE-SOURCE THRESHOLD VOLTAGE
J
I = 250A
D
V = V
DS
GS
V , NORMALIZED
th
0
0.3
0.6
0.9
1.2
1.5
0.5
1
1.5
2
2.5
3
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
D
V = 3.5V
GS
R , NORMALIZED
DS(on)
6.0
4.0
4.5
5.0
5.5
10
8.0
7.0
0
0.3
0.6
0.9
1.2
1.5
0.5
1
1.5
2
2.5
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
T = 125C
J
25C
D
V = 10V
GS
-55C
R , NORMALIZED
DS(on)
Typical Electrical Characteristics: N-Channel
Figure 1. N-Channel On-Region Characteristics.
Figure 2. N-Channel On-Resistance Variation with
Gate Voltage and Drain Current.
Figure 3. N-Channel On-Resistance Variation with
Temperature.
Figure 4. N-Channel On-Resistance Variation with
Drain Current and Temperature.
Figure 5. N-Channel Transfer Characteristics.
Figure 6. N-Channel Gate Threshold Variation
with Temperature.
1
2
3
4
5
6
7
8
0
0.3
0.6
0.9
1.2
1.5
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
25C
125C
V = 10V
DS
GS
D
T = -55C
J
NDC7001C.SAM
-50
-25
0
25
50
75
100
125
150
0.88
0.92
0.96
1
1.04
1.08
1.12
1.16
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE BREAKDOWN VOLTAGE
I = 250A
D
BV , NORMALIZED
DSS
J
0.2
0.4
0.6
0.8
1
1.2
0.001
0.01
0.1
0.5
1
1.5
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
T = 125C
J
25C
-55C
V = 0V
GS
SD
S
0
0.2
0.4
0.6
0.8
1
1.2
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 0.51A
D
V = 25V
DS
0.1
0.2
0.5
1
2
5
10
2 0
50
1
2
5
1 0
2 0
5 0
1 0 0
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C iss
f = 1 MHz
V = 0V
GS
C oss
C rss
Figure 7. N-Channel Breakdown Voltage Variation
with Temperature.
Figure 8. N-Channel Body Diode Forward Voltage
Variation with Current and Temperature
.
Figure 9. N-Channel Capacitance Characteristics.
Figure 10. N-Channel Gate Charge Characteristics.
Typical Electrical Characteristics: N-Channel
(continued)
0
0.3
0.6
0.9
1.2
1.5
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
25C
125C
V = 10V
DS
GS
D
T = -55C
J
Figure 11. N-Channel Transconductance Variation
with Drain Current and Temperature.
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