February 1996
NDS8410
Single N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
____________________________________________________________________________________________
Absolute Maximum Ratings
T
A
= 25C unless otherwise noted
Symbol
Parameter
NDS8410
Units
V
DSS
Drain-Source Voltage
30
V
V
GSS
Gate-Source Voltage
20
V
I
D
Drain Current - Continuous
(Note 1a)
10
A
- Pulsed
50
P
D
Maximum Power Dissipation
(Note 1a)
2.5
W
(Note 1b)
1.2
(Note 1c)
1
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
C
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
50
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
25
C/W
NDS8410 Rev B2
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
10A, 30V. R
DS(ON)
= 0.015
@ V
GS
= 10V
R
DS(ON)
= 0.020
@ V
GS
= 4.5V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
1
5
6
7
8
4
3
2
1997 Fairchild Semiconductor Corporation
ELECTRICAL CHARACTERISTICS
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 A
30
V
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
1
A
T
J
= 55C
10
A
I
GSSF
Gate - Body Leakage, Forward
V
GS
= 20 V, V
DS
= 0 V
100
nA
I
GSSR
Gate - Body Leakage, Reverse
V
GS
= -20 V, V
DS
= 0 V
-100
nA
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 A
1
1.5
V
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= 10 V, I
D
= 10 A
0.013
0.015
V
GS
= 4.5 V, I
D
= 9 A
0.018
0.02
I
D(on)
On-State Drain Current
V
GS
= 10 V, V
DS
= 5 V
20
A
g
FS
Forward Transconductance
V
DS
= 10 V, I
D
= 10 A
22
S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
1350
pF
C
oss
Output Capacitance
800
pF
C
rss
Reverse Transfer Capacitance
300
pF
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
V
DD
= 10 V, I
D
= 1 A,
V
GEN
= 10 V, R
GEN
= 6
14
30
ns
t
r
Turn - On Rise Time
20
25
ns
t
D(off)
Turn - Off Delay Time
56
100
ns
t
f
Turn - Off Fall Time
31
80
ns
Q
g
Total Gate Charge
V
DS
= 15 V,
I
D
= 10 A, V
GS
= 10 V
46
60
nC
Q
gs
Gate-Source Charge
5.6
nC
Q
gd
Gate-Drain Charge
14
nC
NDS8410 Rev B2
ELECTRICAL CHARACTERISTICS
(T
A
= 25C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current
2.1
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 10 A
(Note 2)
0.8
1.2
V
t
rr
Reverse Recovery Time
V
GS
= 0V, I
F
= 2.1 A, dI
F
/dt = 100 A/s
80
ns
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JC
is guaranteed by
design while R
CA
is determined by the user's board design.
P
D
(
t
) =
T
J
-
T
A
R
J A
(
t
)
=
T
J
-
T
A
R
J C
+
R
CA
(
t
)
=
I
D
2
(
t
)
R
DS
(
ON
)
T
J
Typical R
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 50
o
C/W when mounted on a 1 in
2
pad of 2oz copper.
b. 105
o
C/W when mounted on a 0.04 in
2
pad of 2oz copper.
c. 125
o
C/W when mounted on a 0.006 in
2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDS8410 Rev B2
1a
1b
1c
NDS8410 Rev B2
0
0.5
1
1.5
2
2.5
3
0
10
20
30
40
50
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
6.0
4.0
3.5
V =10V
GS
DS
D
3.0
2.5
5.0
4.5
0
1 0
2 0
3 0
4 0
5 0
0.5
1
1.5
2
2.5
3
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 3.0V
GS
D
R , NORMALIZED
DS(on)
3.5
6.0
1 0
4.5
5.0
4.0
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Typical Electrical Characteristics
-50
-25
0
25
50
75
100
125
150
0.6
0.8
1
1.2
1.4
1.6
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE ON-RESISTANCE
J
V = 10V
GS
I = 10A
D
R , NORMALIZED
DS(ON)
0
1 0
2 0
3 0
4 0
5 0
0.5
1
1.5
2
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
T = 125C
J
25C
D
V = 10 V
GS
-55C
R , NORMALIZED
DS(on)
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Drain Current and Temperature.
1
2
3
4
5
0
1 0
2 0
3 0
4 0
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
25C
125C
V = 10V
DS
GS
D
T = -55C
J
-50
-25
0
2 5
5 0
7 5
100
125
150
0.4
0.6
0.8
1
1.2
1.4
T , JUNCTION TEMPERATURE (C)
GATE-SOURCE THRESHOLD VOLTAGE
J
I = 250A
D
V = V
DS
GS
V , NORMALIZED
th
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation
with Temperature.
NDS8410 Rev B2
-50
-25
0
25
50
75
100
125
150
0.92
0.96
1
1.04
1.08
1.12
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE BREAKDOWN VOLTAGE
I = 250A
D
BV , NORMALIZED
DSS
J
0.2
0.4
0.6
0.8
1
1.2
0.001
0.01
0.1
0.5
1
5
1 0
2 0
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
T = 125C
J
25C
-55C
V = 0V
GS
SD
S
Figure 7. Breakdown Voltage
Variation with Temperature.
Figure 8. Body Diode Forward Voltage Variation
with Source Current and
Temperature.
Typical Electrical Characteristics
(continued)
0
10
20
30
40
50
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 10A
D
20V
15V
V = 10V
DS
0.1
0.2
0.5
1
2
5
10
30
2 0 0
3 0 0
5 0 0
8 0 0
1 0 0 0
2 0 0 0
4 0 0 0
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C iss
f = 1 MHz
V = 0V
GS
C oss
C rss
G
D
S
V
DD
R
L
V
V
IN
OUT
V
GS
DUT
R
GEN
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
10%
50%
90%
10%
90%
90%
50%
V
IN
V
OUT
on
off
d(off)
f
r
d(on)
t
t
t
t
t
t
INVERTED
10%
PULSE WIDTH
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