1
www.fairchildsemi.com
NM27LV010 1,048,576-Bit (128k x 8) Low Voltage EPROM
NM27LV010
1,048,576-Bit (128k x 8) Low Voltage EPROM
General Description
The NM27LV010 is a high performance Low Voltage Electrically
Programmable Read Only Memory. It is manufactured using
Fairchild's AMGTM EPROM technology. This technology allows
the part to operate at speeds as fast as 200 ns.
This Low Voltage and Low Power EPROM is designed with power
sensitive hand held and portable battery products in mind. This
allows for code storage of firmware for applications like notebook
computers, palm top computers, cellular phones, and HDD.
Small outline packages are just as critical to portable applications
as Low Voltage and Low Power.
The NM27LV010 is one member of Fairchild's growing Low
Voltage product Family.
Block Diagram
July 1998
Features
s
3.0V to 3.6V operation
s
200 ns access time
s
Low current operation
-- 8 mA I
CC
active current @ 5 MHz (typ.)
-- 20
A I
CC
standby current @ 5 MHz (typ.)
s
Ultra low power operation
-- 66
W standby power @ 3.3V
-- 50 mW active power @ 3.3V
s
Surface mount package options|
-- 32-pin TSOP
-- 32-pin PLCC
DS011377-1
AMGTM is a trademark of WSI, Incorporated.
1998 Fairchild Semiconductor Corporation
Vcc
GND
Vpp
OE
Output Enable,
Chip Enable &
Program Logic
Y
Decoder
X
Decoder
Output
Buffers
1,048,576-Bit
Cell Matrix
A0 - A16
Address
Inputs
Data Outputs O0 - O7
CE
PGM
2
www.fairchildsemi.com
NM27LV010 1,048,576-Bit (128k x 8) Low Voltage EPROM
Connection Diagrams
PLCC Pin Configuration
Top View
TSOP Pin Configuration
Top View
Commercial Temperature Range
(0
C to +70
C) V
CC
= 3.3
0.3
Parameter/Order Number
Access Time (ns)
NM27LV010 V, T 200
200
NM27LV010 V, T 250
250
Pin Names
A0A16
Addresses
CE
Chip Enable
OE
Output Enable
O0O7
Outputs
PGM
Program
XX
Don't Care (During Read)
V
PP
Programming Voltage
Industrial Temperature Range
(-40
C to +85
C) V
CC
= 3.3
0.3
Parameter/Order Number
Access Time (ns)
NM27LV010 VE, TE
200
NM27LV010 VE, TE
250
Package Types: NM27LV010 V, T
V = PLCC
T = TSOP
All packages conform to the JEDEC standard.
All versions are guaranteed to function for slower speeds.
Consult the Fairchild Sales office on new released products
and packages.
Consult the Fairchild representative for custom products for
your specific application.
A14
A13
A8
A9
A11
OE
A10
CE
O7
A7
A6
A5
A4
A3
A2
A1
A0
O0
A
12
A
15
A
16
XX/V
PP
V
CC
XX/PGM
XX
O
1
O
2
GND
O
3
O
4
O
5
O
6
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14 15 16 17 18 19 20
4 3 2 1 32 31 30
A11
A9
A8
A13
A14
NC
PGM
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
OE
A10
CE
O7
O6
O5
O4
O3
VSS
O2
O1
O0
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
8 x 20 MM
TSOP
DS011377-2
DS011377-6
3
www.fairchildsemi.com
NM27LV010 1,048,576-Bit (128k x 8) Low Voltage EPROM
Absolute Maximum Ratings
(Note 1)
Storage Temperature
-65
C to +150
C
All Input Voltages except A9 with
Respect to Ground (Note 10)
-0.6V to +7V
V
PP
and A9 with Respect to Ground
-0.6V to +14V
V
CC
Supply Voltage with
Respect to Ground
-0.6V to +7V
ESD Protection
>2000V
All Output Voltages with
V
CC
+ 1.0V
Respect to Ground (Note 10)
to GND - 0.6V
Operating Range
Range
Temperature
V
CC
Tolerance
Commercial
0
C to +70
C
3.3V
0.3V
Industrial
-40
C to +85
C
3.3V
0.3V
DC Electrical Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
Parameter
Test Conditions
Min
Max
Units
V
IL
Input Low Level
-0.3
0.7
V
V
IH
Input High Level
2.0
V
CC
+ 0.3
V
V
OL1
Output Low Voltage (TTL)
I
OL
= 2.0 mA
0.4
V
V
OH1
Output High Voltage (TTL)
I
OH
= -2.0 mA
2.4
V
V
OL2
Output Low Voltage
I
OL
= 100
A
0.2
V
V
OH2
Output High Voltage (CMOS)
I
OH
= -100
A
V
CC
- 0.3
I
SB1
V
CC
Standby Current
CE = V
CC
0.3V
50
A
(CMOS)
I
SB2
V
CC
Standby Current (TTL)
CE = V
IH
100
A
I
CC
V
CC
Active Current
CE = OE = V
IL
,
f = 5 MHz
15
mA
I/O = 0
A
I
PP
V
PP
Supply Current
V
PP
= V
CC
10
A
V
PP
V
PP
Read Voltage
V
CC
- 0.7
V
CC
V
I
LI
Input Load Current
V
IN
= 3.0V or GND
1
A
I
LO
Output Leakage Current
V
OUT
= 3.0V or GND
-1
10
A
AC Electrical Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
Parameter
200
250
Units
Min
Max
Min
Max
t
ACC
Address to Output Delay
200
250
ns
t
CE
CE to Output Delay
200
250
t
OE
OE to Output Delay
70
75
t
DF
Output Disable to Output Float
50
50
(Note 2)
t
OH
Output Hold from Addresses,
(Note 2)
CE or OE , Whichever
0
0
Occurred First
4
www.fairchildsemi.com
NM27LV010 1,048,576-Bit (128k x 8) Low Voltage EPROM
Capacitance
(Note 2)
T
A
= +25
C, 1 = 1 MHz
Symbol
Parameter
Conditions
Typ
Max
Units
C
IN
Input Capacitance
V
IN
= 0V
9
15
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
15
pF
AC Test Conditions
Output Load
1 TTL Gate and C
L
= 100 pF (Note 8)
Input Rise and Fall Times
5 ns
Input Pulse Levels
0.45V to 2.4V
Timing Measurement Reference Level
Inputs
0.8V and 2V
Outputs
0.8V and 2V
AC Waveforms
(Note 6) , (Note 7) , and (Note 9)
Note 1: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operations sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note 2: This parameter is only sampled and is not 100% tested.
Note 3: OE may be delayed up to t
ACC
- t
CE
after the falling edge of CE without impacting t
ACC
.
Note 4: The t
DF
and t
CF
compare level is determined as follows:
High to TRI-STATE
, the measured V
OH1
(DC) - 0.10V;
Low to TRI-STATE, the measured V
OL1
(DC) + 0.10V.
Note 5: TRI-STATE may be attained using OE or CE .
Note 6: The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.2
F ceramic capacitor be used on every device
between V
CC
and GND.
Note 7: The outputs must be restricted to V
CC
+ 1.0V to avoid latch-up and device damage.
Note 8: 1 TTL Gate: I
OL
= 1.6 mA, I
OH
= -400
A.
C
L
: 100pF includes fixture capacitance.
Note 9: V
PP
may be connected to V
CC
except during programming.
Note 10: Inputs and outputs can undershoot to -2.0V for 20 ns Max.
,,
Address Valid
Valid Output
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
ADDRESS
OUTPUT
CE
OE
tCE
2.0V
0.8V
(Note 3)
(Note 3)
tDF
(Note 2, 4, 5)
(Note 2, 4, 5)
tOH
Hi-Z
tOE
ACC
t
CF
t
,
DS011377-3
5
www.fairchildsemi.com
NM27LV010 1,048,576-Bit (128k x 8) Low Voltage EPROM
Programming Characteristics
(Note 11), (Note 12), (Note 13) and (Note 14)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
AS
Address Setup Time
1
s
t
OES
OE Setup Time
1
s
t
CES
CE Setup Time
1
s
t
DS
Data Setup Time
1
s
t
VPS
V
PP
Setup Time
1
s
t
VCS
V
CC
Setup Time
1
s
t
AH
Address Hold Time
0
s
t
DH
Data Hold Time
1
s
t
DF
Output Enable to Output
CE/PGM = V
IL
0
60
ns
Float Delay
t
PW
Program Pulse Width
45
50
105
s
t
OE
Data Valid from OE
CE/PGM = V
IL
100
ns
I
PP
V
PP
Supply Current
CE/PGM = V
IL
20
mA
during Programming Pulse
I
CC
V
CC
Supply Current
20
mA
T
A
Temperature Ambient
20
25
30
C
V
CC
Power Supply Voltage
6.25
6.5
6.75
V
V
PP
Programming Supply Voltage
12.5
12.75
13.0
V
t
FR
Input Rise, Fall Time
5
ns
V
IL
Input Low Voltage
0.0
0.45
V
V
IH
Input High Voltage
2.4
4.0
V
t
IN
Input Timing Reference Voltage
0.8
2.0
V
t
OUT
Output Timing Reference Voltage
0.8
2.0
V
Programming Waveform
(Note 13)
Note 11: Fairchild's standard product warranty applies to devices programmed to specifications described herein.
Note 12: V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
. The EPROM must not be inserted into or removedfrom a board with
voltage applied to V
PP
or V
CC
.
Note 13: The maximum absolute allowable voltage which may be applied to the V
PP
pin during programming is 14V. Care must be taken when switching the V
PP
supply to
prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1
F capacitor is required across V
PP
, V
CC
to GND to suppress spurious voltage transients
which may damage the device.
Note 14: During power up the PGM pin must be brought high (
V
IH
) either coincident with or before power is applied to V
PP
.
t AS
Program
Program Verify
Address N
Hi-Z
t DS
t DH
t VPS
t AH
2.0V
0.8V
2.0V
0.8V
Addresses
Data
VPP
t CES
Data Out Valid
ADD N
Data In Stable
ADD N
t PW
12.75V
6.25V
VCC
t VCS
CE
PGM
t DF
t
OES
OE
2.0V
0.8V
2.0V
0.8V
t
OE
DS011377-4
PDF 
ZIP