www.docs.chipfind.ru
www.fairchildsemi.com
Pentium is a registered trademark of Intel Corporation. Programmable Active Droop is a trademark of Fairchild Semiconductor.
Rev. 1.0.0
Features
P
rogrammable output for Vcore from 1.3V to 3.5V using
an integrated 5-bit DAC
Controls adjustable linears for Vagp (selectable 1.5V/3.3V),
Vclock (2.5V), and Vtt (1.5V) or Vnorthbridge (1.8V)
Meets VRM specification with as few as 5 capacitors
Meets 1.550V +40/-70mV over initial tolerance,
temperature and transients
Remote sense
Programmable Active DroopTM (Voltage Positioning)
Drives N-Channel MOSFETs
Overcurrent protection using MOSFET sensing
85% efficiency typical at full load
Integrated Power Good and Enable/Soft Start functions
24 pin SOIC package
Applications
Power supply for Pentium
III Camino Platform
Power supply for Pentium III Whitney Platform
VRM for Pentium III processor
Programmable multi-output power supply
Description
The RC5058 is a synchronous mode DC-DC controller IC
which provides a highly accurate, programmable set of output
voltages for multi-voltage platforms such as the Intel Camino,
and provides a complete solution for the Intel Whitney and other
high-performance processors. The RC5058 features remote
voltage sensing, independently adjustable current limit, and a
proprietary Programmable Active Droop
TM
for optimal converter
transient response. The RC5058 uses a 5-bit D/A converter
to program the output voltage from 1.3V to 3.5V. The RC5058
uses a high level of integration to deliver load currents in excess
Block Diagram
VID3
VID2
VID1
16
VID0
GNDP
23
22
2
18
24
1
17
-
+
-
+
OSC
1.24V
Reference
Digital
Control
Power
Good
5-Bit
DAC
VID4
8 7 6 5 4
+5V
+12V
PWRGD
-
+
ENABLE/SS
VCC
GNDA
3
LODRV
HIDRV
VCCP
21
VCCA
+5V
20
-
REF
REF
PWRGD,
OCL
PWRGD,
OCL
+3.3V
+1.5V
10
9
+2.5V
12
11
19
OCL
-
+
VCCP
PWRGD, OCL
V
3.3/1.5V
15
14
13
R
D
R
S
-
+
+
-
+
-
+
RC5058
High Performance Programmable Synchronous
DC-DC Controller for Multi-Voltage Platforms
RC5058
PRODUCT SPECIFICATION
2
REV. 1.0.0 6/30/00
of 16A from a 5V source with minimal external circuitry.
Synchronous-mode operation offers optimum efficiency over
the entire specified output voltage range. An on-board precision
low TC reference achieves tight tolerance voltage regulation
without expensive external components, while Programmable
Active Droop
TM
permits exact tailoring of voltage for the most
demanding load transients. The RC5058 includes linear regulator
controllers for Vtt termination (1.5V), Vclock (2.5V), and
Vnorthbridge (1.8V) or Vagp (selectable 1.5V/3.3V), each adjust-
able with an external divider. The RC5058 also offers integrated
functions including Power Good, Output Enable/Soft Start and
current limiting, and is available in a 24 pin SOIC package.
Pin Assignments
24
23
22
21
20
19
18
17
16
15
14
13
RC5058
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
VTTGATE
VTTFB
VCKGATE
VCKFB
VCCP
LODRV
GNDP
VCCA
VFB
DROOP
ILIM
PWRGD
SS/ENABLE
TYPEDET
VAGPGATE
VAGPFB
1
2
3
4
5
6
7
8
9
10
11
12
Pin Definitions
Pin
Number Pin Name
Pin Function Description
1
HIDRV
High Side FET Driver.
Connect this pin through a resistor to the gate of an N-channel
MOSFET. The trace from this pin to the MOSFET gate should be <0.5".
2
SW
High side Driver Source and Low side Driver Drain Switching Node.
Together with
DROOP and ILIM pins allows FET sensing for Vcc current.
3
GNDA
Analog Ground.
Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
4-8
VID0-4
Voltage Identification Code Inputs.
These open collector/TTL compatible inputs will
program the output voltage over the ranges specified in Table 2. Pull-up resistors are
internal to the controller.
9
VTTGATE
Gate Driver for VTT Transistor.
For 1.5V output.
10
VTTFB
Voltage Feedback for VTT.
11
VCKGATE
Gate Driver for VCK Transistor.
For 2.5V output.
12
VCKFB
Voltage Feedback for VCK.
13
VAGPFB
Voltage Feedback for VAGP.
14
VAGPGATE
Gate Driver for VAGP Transistor.
For 3.3/1.5V output.
15
TYPEDET
Type Detect.
Sets 3.3V or 1.5V for AGP.
16
ENABLE/SS
Output Enable.
A logic LOW on this pin will disable all outputs. An internal current source
allows for open collector control. This pin also doubles as soft start for all outputs.
17
PWRGD
Power Good Flag.
An open collector output that will be logic LOW if any output voltage
is more than 12% outside of the nominal output voltage setpoint.
18
ILIM
Vcc Current Feedback.
Pin 18 is used in conjunction with pin 2 as the input for the Vcc
current feedback control loop. Layout of these traces is critical to system performance.
See Application Information for details.
19
DROOP
Droop set.
Use this pin to set magnitude of active droop.
20
VFB
Vcc Voltage Feedback.
Pin 20 is used as the input for the Vcc voltage feedback control
loop. See Application Information for details regarding correct layout.
21
VCCA
Analog VCC.
Connect to system 5V supply and decouple with a 0.1F ceramic capacitor.
22
GNDP
Power Ground.
Return pin for high currents flowing in pin 24 (VCCP).
23
LODRV
Vcc Low Side FET Driver.
Connect this pin through a resistor to the gate of an N-channel
MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should
be <0.5".
24
VCCP
Power VCC.
For all FET drivers. Connect to system 12V supply through a 33
, and
decouple with a 1F ceramic capacitor.
PRODUCT SPECIFICATION
RC5058
REV. 1.0.0 6/30/00
3
Absolute Maximum Ratings
Note:
1. Component mounted on demo board in free air.
Recommended Operating Conditions
Supply Voltage VCCA to GND
13.5V
Supply Voltage VCCP to GND
15V
Voltage Identification Code Inputs, VID0-VID4
VCCA
All Other Pins
13.5V
Junction Temperature, T
J
150C
Storage Temperature
-65 to 150C
Lead Soldering Temperature, 10 seconds
300C
Thermal Resistance Junction-to-ambient,
JA
1
75C/W
Parameter
Conditions
Min.
Typ.
Max.
Units
Supply Voltage VCCA
4.5
5
5.25
V
Input Logic HIGH
2.0
V
Input Logic LOW
0.8
V
Ambient Operating Temperature
0
70
C
Output Driver Supply, VCCP
10.8
12
13.2
V
Electrical Specifications
(V
CCA
= 5V, V
CCP
= 12V, V
OUT
= 2.0V, and T
A
= +25C using circuit in Figure 1 unless otherwise noted.)
The denotes specifications which apply over the full operating temperature range.
Parameter
Conditions
Min.
Typ.
Max.
Units
VCC Regulator
Output Voltage
See Table 1
1.3
3.5
V
Output Current
18
A
Initial Voltage Setpoint
I
LOAD
= 0.8A,V
OUT
= 2.400V
V
OUT
= 2.000V
V
OUT
= 1.550V
2.397
2.000
1.550
2.424
2.020
1.565
2.454
2.040
1.580
V
V
V
Output Temperature Drift
T
A
= 0 to 70C,V
OUT
= 2.000V
V
OUT
= 1.550V
+8
+6
mV
mV
Line Regulation
V
IN
= 4.75V to 5.25V
-4
mV/V
Internal Droop Impedance
I
LOAD
= 0.8A to 12.5A
13.0
14.4
15.8
K
Maximum Droop
60
mV
Output Ripple
20MHz BW, I
LOAD
= 18A
11
mVpk
Total Output Variation,
Steady State
1
V
OUT
= 2.000V
V
OUT
= 1.550V
3
1.940
1.480
2.070
1.590
V
Total Output Variation,
Transient
2
I
LOAD
= 0.8A to 18A, V
OUT
= 2.000V
V
OUT
= 1.550V
3
1.900
1.480
2.100
1.590
V
Short Circuit Detect Current
45
50
60
A
Efficiency
I
LOAD
= 18A, V
OUT
= 2.0V
85
%
Output Driver Rise & Fall Time
See Figure 3
50
nsec
Output Driver Deadtime
See Figure 3
50
nsec
RC5058
PRODUCT SPECIFICATION
4
REV. 1.0.0 6/30/00
Notes:
1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is
measured at the converter's VFB sense point.
2. As measured at the converter's VFB sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5m
trace resistance between the converter's output capacitors and the CPU. Remote sensing should be used for optimal
performance.
3. Using the VFB pin for remote sensing of the converter's output at the load, the converter will be in compliance with Intel's VRM 8.4
specification of +50, 80mV. If Intel specifications on maximum plane resistance from the converter's output capacitors to the CPU
are met, the specification of +40, 70mV at the capacitors will also be met.
Duty Cycle
0
100
%
5V UVLO
3.74
4
4.26
V
12V UVLO
7.65
8.5
9.35
V
Soft Start Current
5
10
17
A
VTT Linear Regulator
Output Voltage
I
LOAD
2A
1.455
1.5
1.545
V
Under Voltage Trip Level
Over Current
80
%V
O
VCLK Linear Regulator
Output Voltage
I
LOAD
2A
2.375
2.5
2.625
V
Under Voltage Trip Level
Over Current
80
%V
O
VAGP Linear Regulator
Output Voltage
I
LOAD
2A, TYPEDET=0V
1.425
1.5
1.575
V
Output Voltage
I
LOAD
2A, TYPEDET=OPEN
3.135
3.3
3.465
V
Under Voltage Trip Level
Over Current
80
%V
O
Common Functions
Oscillator Frequency
255
310
345
kHz
PWRGD Threshold
Logic HIGH, All Outputs
Logic LOW, Any Output
92
88
108
112
%V
OUT
Linear Regulator Under Voltage
Delay Time
Over Current
30
sec
Electrical Specifications
(Continued)
(V
CCA
= 5V, V
CCP
= 12V, V
OUT
= 2.0V, and T
A
= +25C using circuit in Figure 1 unless otherwise noted.)
The denotes specifications which apply over the full operating temperature range.
Parameter
Conditions
Min.
Typ.
Max.
Units
PRODUCT SPECIFICATION
RC5058
REV. 1.0.0 6/30/00
5
Note:
1. 0 = processor pin is tied to GND.
1 = processor pin is open.
Table 1. Output Voltage Programming Codes
VID4
VID3
VID2
VID1
VID0
Nominal V
OUT
0
1
1
1
1
1.30V
0
1
1
1
0
1.35V
0
1
1
0
1
1.40V
0
1
1
0
0
1.45V
0
1
0
1
1
1.50V
0
1
0
1
0
1.55V
0
1
0
0
1
1.60V
0
1
0
0
0
1.65V
0
0
1
1
1
1.70V
0
0
1
1
0
1.75V
0
0
1
0
1
1.80V
0
0
1
0
0
1.85V
0
0
0
1
1
1.90V
0
0
0
1
0
1.95V
0
0
0
0
1
2.00V
0
0
0
0
0
2.05V
1
1
1
1
1
2.0V
1
1
1
1
0
2.1V
1
1
1
0
1
2.2V
1
1
1
0
0
2.3V
1
1
0
1
1
2.4V
1
1
0
1
0
2.5V
1
1
0
0
1
2.6V
1
1
0
0
0
2.7V
1
0
1
1
1
2.8V
1
0
1
1
0
2.9V
1
0
1
0
1
3.0V
1
0
1
0
0
3.1V
1
0
0
1
1
3.2V
1
0
0
1
0
3.3V
1
0
0
0
1
3.4V
1
0
0
0
0
3.5V
PDF 
ZIP