2002 Fairchild Semiconductor Corporation
RFD14N05, RFD14N05SM, RFP14N05 Rev. B1
RFD14N05, RFD14N05SM, RFP14N05
14A, 50V, 0.100 Ohm, N-Channel Power
MOSFETs
These are N-channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits, gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA09770.
Features
14A, 50V
r
DS(ON)
= 0.100
Temperature Compensating PSPICE
Model
Peak Current vs Pulse Width Curve
UIS Rating Curve
175
o
C Operating Temperature
Related Literature
- TB334 "Guidelines for Soldering Surface Mount
Components to PC Boards"
Symbol
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
JEDEC TO-220AB
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFD14N05
TO-251AA
D14N05
RFD1 4N05SM
TO-252AA
D14N05
RFP14N05
TO-220AB
RFP14N05
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e., RFD14N05SM9A.
G
D
S
SOURCE
DRAIN (FLANGE)
GATE
DRAIN
GATE
SOURCE
DRAIN (FLANGE)
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
Data Sheet
January 2002
2002 Fairchild Semiconductor Corporation
RFD14N05, RFD14N05SM, RFP14N05 Rev. B1
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
RFD14N05, RFD14N05SM,
RFP14N05
UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
50
V
Drain to Gate Voltage (R
GS
= 20k
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
50
V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
20
V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
14
Refer to Peak Current Curve
A
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Refer to UIS Curve
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
48
0.32
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J,
T
STG
-55 to 175
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief 334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress on ly rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250
A, V
GS
= 0V (Figure 9)
50
-
-
V
Gate Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250
A
2
-
4
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= Rated BV
DSS
, V
GS
= 0V
-
-
25
A
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
C
= 150
o
C
-
-
250
A
Gate to Source Leakage Current
I
GSS
V
GS
=
2
0V
-
-
100
nA
Drain to Source On Resistance (Note 2)
r
DS(ON)
I
D
= 14A, V
GS
= 10V, (Figure 11)
-
-
0.100
Turn-On Time
t
ON
V
DD
= 25V, I
D
14A, V
GS
= 10V,
R
GS
= 25
,
R
L
= 1.7
(Figure 13)
-
-
60
ns
Turn-On Delay Time
t
d(ON)
-
14
-
ns
Rise Time
t
r
-
26
-
ns
Turn-Off Delay Time
t
d(OFF)
-
45
-
ns
Fall Time
t
f
-
17
-
ns
Turn-Off Time
t
OFF
-
-
100
ns
Total Gate Charge
Q
g(TOT)
V
GS
= 0V to 20V
V
DD
= 40V, I
D
= 14A,
R
L
= 2.86
I
g(REF)
= 0.4mA
(Figure 13)
-
-
40
nC
Gate Charge at 5V
Q
g(10)
V
GS
= 0V to 10V
-
-
25
nC
Threshold Gate Charge
Q
g(TH)
V
GS
= 0V to 2V
-
-
1.5
nC
Input Capacitance
C
ISS
V
DS
= 25V, V
GS
= 0V, f = 1MHz
(Figure 12)
-
570
-
pF
Output Capacitance
C
OSS
-
185
-
pF
Reverse Transfer Capacitance
C
RSS
-
50
-
pF
Thermal Resistance Junction to Case
R
JC
-
-
3.125
o
C/W
Thermal Resistance Junction to Ambient
R
JA
TO-251 and TO-252
-
-
100
o
C/W
R
JA
TO-220
-
-
80
o
C/W
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Voltage (Note 2)
V
SD
I
SD
= 14A
-
-
1.5
V
Diode Reverse Recovery Time
t
rr
I
SD
= 14A, dI
SD
/dt = 100A/
s
-
-
125
ns
NOTES:
2. Pulse Test: Pulse Width
300ms, Duty Cycle
2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current
Capability Curve (Figure 5).
RFD14N05, RFD14N05SM, RFP14N05
2002 Fairchild Semiconductor Corporation
RFD14N05, RFD14N05SM, RFP14N05 Rev. B1
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
T
C
, CASE TEMPERATURE (
o
C)
25
50
75
100
125
150
175
0
P
O
W
E
R
D
I
S
S
I
P
A
T
I
O
N
M
U
L
T
I
P
L
I
E
R
0
0
0.2
0.4
0.6
0.8
1.0
1.2
8
4
0
25
50
75
100
125
150
12
I
D
,
D
R
A
I
N
C
U
R
R
E
N
T
(
A
)
T
C
, CASE TEMPERATURE (
o
C)
16
175
t, RECTANGULAR PULSE DURATION (s)
10
-3
10
-2
10
-1
10
0
0.01
0.1
1
10
-5
10
1
10
-4
T
H
E
R
M
A
L
I
M
P
E
D
A
N
C
E
Z
J
C
,
N
O
R
M
A
L
I
Z
E
D
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
0.5
P
DM
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JA
x R
JA
+ T
A
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10
100
1
100
10
1
I
D
,
D
R
A
I
N
C
U
R
R
E
N
T
(
A
)
DC
100
s
100ms
1ms
10ms
LIMITED BY r
DS(ON)
AREA MAY BE
OPERATION IN THIS
T
J
= MAX RATED
T
C
= 25
o
C
SINGLE PULSE
t, PULSE WIDTH (s)
10
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
V
GS
= 10V
100
I
D
M
,
P
E
A
K
C
U
R
R
E
N
T
C
A
P
A
B
I
L
I
T
Y
(
A
)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
V
GS
= 20V
I
I25
175
TC
150
---------------------
=
RFD14N05, RFD14N05SM, RFP14N05
2002 Fairchild Semiconductor Corporation
RFD14N05, RFD14N05SM, RFP14N05 Rev. B1
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 11. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified
(Continued)
0.1
1
10
10
0.01
50
1
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R = 0
If R
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
-V
DD
) +1]
I
A
S
,
A
V
A
L
A
N
C
H
E
C
U
R
R
E
N
T
(
A
)
t
AV
, TIME IN AVALANCHE (ms)
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
0
5
10
15
0
2
4
6
8
20
25
I
D
,
D
R
A
I
N
C
U
R
R
E
N
T
(
A
)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 4.5V
V
GS
= 5V
V
GS
= 6V
V
GS
= 7V
V
GS
= 20V
30
35
V
GS
= 8V
V
GS
= 10V
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
0
4
6
8
10
2
0
5
10
15
20
25
175
o
C
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
I
D
S
(
O
N
)
,
D
R
A
I
N
T
O
S
O
U
R
C
E
C
U
R
R
E
N
T
(
A
)
V
GS
, GATE TO SOURCE VOLTAGE (V)
-55
o
C
30
35
-25
o
C
2.0
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
N
O
R
M
A
L
I
Z
E
D
D
R
A
I
N
T
O
S
O
U
R
C
E
B
R
E
A
K
D
O
W
N
V
O
L
T
A
G
E
200
I
D
= 250
A
-80
-40
0
40
80
120
160
0
0.5
1.0
1.5
2.0
V
G
S
(
T
H
)
,
N
O
R
M
A
L
I
Z
E
D
G
A
T
E
T
H
R
E
S
H
O
L
D
V
O
L
T
A
G
E
T
J
, JUNCTION TEMPERATURE (
o
C)
200
V
GS
= V
DS
, I
D
= 250
A
0
0.5
1.0
1.5
2.0
-80
-40
0
40
80
120
160
N
O
R
M
A
L
I
Z
E
D
D
R
A
I
N
T
O
S
O
U
R
C
E
T
J
, JUNCTION TEMPERATURE (
o
C)
200
2.5
O
N
R
E
S
I
S
T
A
N
C
E
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10V, ID = 14A
RFD14N05, RFD14N05SM, RFP14N05
2002 Fairchild Semiconductor Corporation
RFD14N05, RFD14N05SM, RFP14N05 Rev. B1
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260,
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT CURRENT GATE DRIVE
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified
(Continued)
700
500
200
0
0
5
10
15
20
25
C
,
C
A
P
A
C
I
T
A
N
C
E
(
p
F
)
400
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
ISS
C
OSS
C
RSS
300
100
600
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
G D
C
OSS
C
DS
+ C
G D
30
15
0
20
IG REF
(
)
IG ACT
(
)
----------------------
t, TIME (
s)
80
IG REF
(
)
IG ACT
(
)
----------------------
10
5.0
2.5
0
V
DD
= BV
DSS
V
DD
= BV
DSS
V
D
S
,
D
R
A
I
N
T
O
S
O
U
R
C
E
V
O
L
T
A
G
E
(
V
)
V
G
S
,
G
A
T
E
T
O
S
O
U
R
C
E
V
O
L
T
A
G
E
(
V
)
R
L
= 3.57
I
G(REF)
= 0.4mA
V
GS
= 10V
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
60
7.5
45
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
V
GS
R
L
R
GS
DUT
+
-
V
DD
V
DS
V
GS
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
RFD14N05, RFD14N05SM, RFP14N05
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