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2004 Fairchild Semiconductor Corporation
June 2004
RMWB24001 Rev. D
RMWB24001
RMWB24001
24 GHz Buffer Amplifier MMIC
General Description
The RMWB24001 is a 3-stage GaAs MMIC amplifier
designed as an 17 to 24 GHz Buffer Amplifier for use in
point to point and point to multi-point radios, and various
communications applications. In conjunction with other
amplifiers, multipliers and mixers it forms part of a complete
23 and 26 GHz transmit/receive chipset. The RMWB24001
utilizes our 0.25m power PHEMT process and is
sufficiently versatile to serve in a variety of medium power
amplifier applications.
Features
4 mil Substrate
Small-signal Gain 25dB (typ.)
Saturated Power Out 17dBm (typ.)
Voltage Detector Included to Monitor Pout
Chip size 2.5mm x 1.5mm x 100m
Absolute Ratings
Symbol
Parameter
Ratings
Units
Vd
Positive DC Voltage (+4V Typical)
+6
V
Vg
Negative DC Voltage
-2
V
Vdg
Simultaneous (VdVg)
8
V
I
D
Positive DC Current
110
mA
P
IN
RF Input Power (from 50
source)
+11
dBm
T
C
Operating Baseplate Temperature
-30 to +85
C
T
STG
Storage Temperature Range
-55 to +125
C
R
JC
Thermal Resistance (Channel to Backside)
148
C/W
Device
2004 Fairchild Semiconductor Corporation
RMWB24001 Rev. D
RMWB24001
Electrical Characteristics
(At 25C), 50
system, Vd = +4V, Quiescent Current Idq = 70mA
Note:
1:
Typical range of gate voltage is -0.5 to 0V to set typical Idq of 70mA.
Application Information
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal
conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat, plated with
gold over nickel and should be capable of withstanding 325C for 15 minutes.
Die attachment should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for PHEMT
devices. Note that the backside of the chip is gold plated and is used as RF and DC ground.
These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination of
bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including the use of
wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent static discharges
through the device.
Recommended wire bonding uses 3 mils wide and 0.5 mil thick gold ribbon with lengths as short as practical allowing for
appropriate stress relief. The RF input and output bonds should be typically 0.012" long corresponding to a typical 2 mil gap
between the chip and the substrate material.
Figure 1. Functional Block Diagram
1
Note:
1:
Detector delivers >0V DC into 3k
load resistor for > +17dBm output power. If output power level detection is not desired, do not make connection to detector
bond pad.
Parameter
Min
Typ
Max
Units
Frequency Range
17
24
GHz
Gate Supply Voltage
1
(Vg)
-0.2
V
Gain (Small Signal Pin = 10dBm)
13
15
18
dB
Gain Variation vs. Frequency
2.0
dB
Power Output Saturated: (Pin = +5dBm)
14
17
19
dBm
Drain Current at Psat
80
mA
Power Added Efficiency (PAE): at Psat
15
%
Input Return Loss (Pin = -10dBm)
12
dB
Output Return Loss (Pin = -10dBm)
12
dB
DC Detector Voltage at Pout = 17dBm
1.0
V
RF IN
RF OUT
GROUND
(Back of Chip)
DRAIN
SUPPLY
Vd1
DRAIN
SUPPLY
Vd2 and Vd3
MMIC CHIP
OUTPUT POWER
DETECTOR VOLTAGE
Vdet
GATE SUPPLY
Vg
2004 Fairchild Semiconductor Corporation
RMWB24001 Rev. D
RMWB24001
Figure 2. Chip Layout and Bond Pad Locations
Chip Size is 2.50mm x 1.50mm X 100m. Back of chip is RF and DC Ground.
Figure 3. Recommended Application Schematic Circuit Diagram
0.00
0.405
0.56
0.715
0.12
1.38
1.50
0.00
1.14
2.38 2.50
0.665
0.975
0.82
1.38
0.00
0.48
1.77
2.02
2.38 2.50
0.11
0.11
Dimensions in millimeters
MMIC Chip
RF IN
Gate Supply V
g
Ground
(Back of Chip)
Bond Wires
10,000 pF
Bond Wires
Drain Supply
V
d
=4 V
RF OUT
100 pF
Bond Wires
3 k
Output Power
Detector Voltage V
det
100 pF
100 pF
100 pF
10,000 pF
Note:
Detector delivers > 0.1 V DC into 3 k
load resistor for > +17 dBm output power. If output power level detection is not desired, do
not connect to detector bond pad.
2004 Fairchild Semiconductor Corporation
RMWB24001 Rev. D
RMWB24001
Figure 4. Recommended Assembly Diagram
Note:
Use 0.003" by 0.0005" Gold Ribbon for bonding. RF input and output bonds should be less than 0.015" long with stress relief.
100pF
RF Input
RF Output
5mil Thick
Alumina
50 ohms
5 mil Thick
Alumina
50 ohms
2 mil Gap
L< 0.015"
(4 Places)
Die-Attach
80 Au/20 Sn
10,000pF
10,000 pF
100 pF
100 pF
Drain Supply
V
d
= 4 V
Gate Supply V
g
Output Power
Detector Voltage V
det
3 k
100 pF
2004 Fairchild Semiconductor Corporation
RMWB24001 Rev. D
RMWB24001
RMWB24001 24 GHz BA, Pout vs Pin Performance
On-Wafer Measurements, Vd = 4 V, Idq = 70 mA
20
0
18
16
14
12
10
8
6
4
2
Output P
o
w
e
r (dBm
), G
a
in (dB)
Input Power (dBm)
-14
-12
-10
-8
-6
-4
-2
0
2
4
6
8
-16
10
17 GHz
21 GHz
24 GHz
Recommended Procedure for Biasing and Operation
CAUTION: LOSS OF GATE VOLTAGE (Vg) WHILE
DRAIN VOLTAGE (Vd) IS PRESENT MAY DAMAGE THE
AMPLIFIER CHIP.
The following sequence of steps must be followed to
properly test the amplifier:
Step 1:
Turn off RF input power.
Step 2:
Connect the DC supply grounds to the ground of
the chip carrier. Slowly apply negative gate bias supply
voltage of -1.5V to Vg.
Step 3:
Slowly apply positive drain bias supply voltage of
+4V to Vd.
Step 4:
Adjust gate bias voltage to set the quiescent
current of Idq = 70mA.
Step 5:
After the bias condition is established, the RF input
signal may now be applied at the appropriate frequency
band.
Step 6:
Follow turn-off sequence of:
(i) Turn off RF input power,
(ii) Turn down and off drain voltage (Vd),
(iii) Turn down and off gate bias voltage (Vg).
Typical Characteristics
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