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2003 Fairchild Semiconductor Corporation
Rev. B, January 2003
S
SP10N60B/
SSS1
0N60B
SSP10N60B/SSS10N60B
600V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies.
Features
9.0A, 600V, R
DS(on)
= 0.8
@V
GS
= 10 V
Low gate charge ( typical 54 nC)
Low Crss ( typical 32 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings
T
C
= 25C unless otherwise noted
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
Parameter
SSP10N60B
SSS10N60B
Units
V
DSS
Drain-Source Voltage
600
V
I
D
Drain Current
- Continuous (T
C
= 25C)
9.0
9.0 *
A
- Continuous (T
C
= 100C)
5.7
5.7 *
A
I
DM
Drain Current
- Pulsed
(Note 1)
36
36 *
A
V
GSS
Gate-Source Voltage
30
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
520
mJ
I
AR
Avalanche Current
(Note 1)
9.0
A
E
AR
Repetitive Avalanche Energy
(Note 1)
15.6
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
5.5
V/ns
P
D
Power Dissipation (T
C
= 25C)
156
50
W
- Derate above 25C
1.25
0.4
W/C
T
J
, T
STG
Operating and Storage Temperature Range
-55 to +150
C
T
L
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
300
C
Symbol
Parameter
SSP10N60B
SSS10N60B
Units
R
JC
Thermal Resistance, Junction-to-Case Max.
0.8
2.5
C
/
W
R
CS
Thermal Resistance, Case-to-Sink Typ.
0.5
--
C
/
W
R
JA
Thermal Resistance, Junction-to-Ambient Max.
62.5
62.5
C
/
W
TO-220
SSP Series
G
S
D
S
D
G
TO-220F
SSS Series
G
S
D
Rev. B, January 2003
S
SP10N60B/
SSS1
0N60B
2003 Fairchild Semiconductor Corporation
Electrical Characteristics
T
C
= 25C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 11.8mH, I
AS
= 9.0A, V
DD
= 50V, R
G
= 25
,
Starting T
J
= 25C
3. I
SD
10A, di/dt
300A/
s, V
DD
BV
DSS,
Starting T
J
= 25C
4. Pulse Test : Pulse width
300
s, Duty cycle
2%
5. Essentially independent of operating temperature
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250
A
600
--
--
V
BV
DSS
/
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25C
--
0.65
--
V/C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 600 V, V
GS
= 0 V
--
--
10
A
V
DS
= 480 V, T
C
= 125C
--
--
100
A
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= 30 V, V
DS
= 0 V
--
--
100
nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= -30 V, V
DS
= 0 V
--
--
-100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
2.0
--
4.0
V
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 10 V, I
D
= 4.5 A
--
0.65
0.8
g
FS
Forward Transconductance
V
DS
= 40 V, I
D
= 4.5 A
(Note 4)
--
10.3
--
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
2100
2700
pF
C
oss
Output Capacitance
--
175
230
pF
C
rss
Reverse Transfer Capacitance
--
32
42
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= 300 V, I
D
= 10 A,
R
G
= 25
(Note 4, 5)
--
35
80
ns
t
r
Turn-On Rise Time
--
100
210
ns
t
d(off)
Turn-Off Delay Time
--
185
380
ns
t
f
Turn-Off Fall Time
--
115
240
ns
Q
g
Total Gate Charge
V
DS
= 480 V, I
D
= 10 A,
V
GS
= 10 V
(Note 4, 5)
--
54
70
nC
Q
gs
Gate-Source Charge
--
9.3
--
nC
Q
gd
Gate-Drain Charge
--
21
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
--
--
9.0
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
36
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 9.0 A
--
--
1.4
V
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
S
= 10 A,
dI
F
/ dt = 100 A/
s
(Note 4)
--
470
--
ns
Q
rr
Reverse Recovery Charge
--
6.25
--
C
Rev. B, January 2003
S
SP10N60B/
SSS1
0N60B
2003 Fairchild Semiconductor Corporation
0
10
20
30
40
50
60
0
2
4
6
8
10
12
V
DS
= 300V
V
DS
= 120V
V
DS
= 480V
Note : I
D
= 10 A
V
GS
,
G
a
t
e
-
S
ou
r
c
e V
o
l
t
age [
V
]
Q
G
, Total Gate Charge [nC]
10
-1
10
0
10
1
0
1000
2000
3000
4000
C
oss
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
iss
C
apa
c
i
t
a
nc
e [
p
F]
V
DS
, Drain-Source Voltage [V]
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10
-1
10
0
10
1
150
Notes :
1. V
GS
= 0V
2. 250
s Pulse Test
25
I
DR
,
R
e
v
e
r
s
e D
r
ai
n C
u
r
r
e
n
t
[
A
]
V
SD
, Source-Drain voltage [V]
0
5
10
15
20
25
30
0.0
0.5
1.0
1.5
2.0
2.5
V
GS
= 20V
V
GS
= 10V
Note : T
J
= 25
R
DS
(
O
N)
[
],
D
r
ai
n-
S
o
u
r
c
e
O
n
-
R
es
i
s
t
anc
e
I
D
, Drain Current [A]
2
4
6
8
10
10
-1
10
0
10
1
150
o
C
25
o
C
-55
o
C
Notes :
1. V
DS
= 40V
2. 250
s Pulse Test
I
D
,
D
r
ai
n C
u
r
r
e
nt
[
A
]
V
GS
, Gate-Source Voltage [V]
10
-1
10
0
10
1
10
-1
10
0
10
1
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Bottom : 5.0 V
Notes :
1. 250
s Pulse Test
2. T
C
= 25
I
D
,
D
r
ai
n C
u
r
r
e
n
t
[
A
]
V
DS
, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 2. Transfer Characteristics
Figure 1. On-Region Characteristics
2003 Fairchild Semiconductor Corporation
Rev. B, January 2003
S
SP10N60B/
SSS1
0N60B
10
0
10
1
10
2
10
3
10
-2
10
-1
10
0
10
1
10
2
100 ms
DC
10 ms
1 ms
100
s
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
I
D
,
D
r
ai
n
C
u
r
r
ent
[
A
]
V
DS
, Drain-Source Voltage [V]
25
50
75
100
125
150
0
2
4
6
8
10
I
D
,
D
r
ai
n C
u
r
r
e
nt
[
A
]
T
C
, Case Temperature [
]
10
0
10
1
10
2
10
3
10
-2
10
-1
10
0
10
1
10
2
10
s
DC
10 ms
1 ms
100
s
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
I
D
,
D
r
ai
n C
u
r
r
ent
[
A
]
V
DS
, Drain-Source Voltage [V]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. V
GS
= 10 V
2. I
D
= 5.0 A
R
DS
(
O
N
)
,
(
N
or
m
a
l
i
z
ed)
D
r
ai
n-
Sour
c
e
O
n
-
R
es
i
s
t
a
n
c
e
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
Notes :
1. V
GS
= 0 V
2. I
D
= 250
A
BV
DS
S
,
(
N
or
m
a
l
i
z
e
d)
D
r
a
i
n-
S
o
ur
c
e
B
r
ea
k
d
o
w
n
V
o
l
t
ag
e
T
J
, Junction Temperature [
o
C]
Typical Characteristics
(Continued)
Figure 9-1. Maximum Safe Operating Area
for SSP10N60B
Figure 10. Maximum Drain Current
vs Case Temperature
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Figure 9-2. Maximum Safe Operating Area
for SSS10N60B
Rev. B, January 2003
S
SP10N60B/
SSS1
0N60B
2003 Fairchild Semiconductor Corporation
Typical Characteristics
(Continued)
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
1 0
-2
1 0
-1
1 0
0
N o te s :
1 . Z
J C
(t) = 0 .8
/W M a x .
2 . D u ty F a c to r, D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
J C
(t)
s in g le p u ls e
D = 0 .5
0 . 0 2
0 . 2
0 . 0 5
0 . 1
0 . 0 1
Z
JC
(t), T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
t
1
, S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11-1. Transient Thermal Response Curve for SSP10N60B
t
1
P
DM
t
2
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
1 0
-2
1 0
-1
1 0
0
N o te s :
1 . Z
J C
(t) = 2 .5
/W M a x .
2 . D u ty F a c to r, D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
J C
(t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
JC
(t), T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
t
1
, S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11-2. Transient Thermal Response Curve for SSS10N60B
t
1
P
DM
t
2
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