LP750SOT89
L
OW
N
OISE
,
H
IGH
L
INEARITY
P
ACKAGED
PHEMT
Phone: (408) 988-1845
http:// www.filss.com
Revised: 1/18/02
Fax: (408) 970-9950
Email: sales@filss.com
FEATURES
26 dBm Output Power at 1-dB Compression at 1.8 GHz
17 dB Power Gain at 1.8 GHz
0.7 dB Noise Figure
40 dBm Output IP3 at 1.8 GHz
55% Power-Added Efficiency
DESCRIPTION AND APPLICATIONS
The LP750SOT89 is a packaged Aluminum Gallium Arsenide / Indium Gallium Arsenide
(AlGaAs/InGaAs) pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a
0.25
m x 750
m Schottky barrier gate, defined by electron-beam photolithography. The recessed
"mushroom" gate structure minimizes parasitic gate-source and gate resistance. The epitaxial
structure and processing have been optimized for reliable high-power applications. The LP750 also
features Si3N4 passivation and is available in die form or in other packages.
Typical applications include drivers or output stages in PCS/Cellular amplifiers, WLL and WLAN
systems, and other types of wireless infrastructure systems.
ELECTRICAL SPECIFICATIONS @ T
Ambient
= 25C
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Saturated Drain-Source Current
LP750SOT89-1
I
DSS
V
DS
= 2 V; V
GS
= 0 V
180
230
mA
LP750SOT89-2
231
265
mA
Power at 1-dB Compression
P-1dB
V
DS
= 5 V; I
DS
= 50% I
DSS
24
26
dBm
Power Gain at 1-dB Compression
G-1dB
V
DS
= 5 V; I
DS
= 50% I
DSS
15.5
17
dB
Power-Added Efficiency
PAE
V
DS
= 5 V; I
DS
= 50% I
DSS
;
P
IN
= 10 dBm
55
%
Noise Figure
NF
V
DS
= 5 V; I
DS
= 50% I
DSS
0.7
dB
Output Third-Order Intercept Point
IP3
V
DS
= 5V; I
DS
= 50% I
DSS
;
P
IN
= -7 dBm
40
dBm
Maximum Drain-Source Current
I
MAX
V
DS
= 2 V; V
GS
= 1 V
450
mA
Transconductance
G
M
V
DS
= 2 V; V
GS
= 0 V
170
220
mS
Gate-Source Leakage Current
I
GSO
V
GS
= -5 V
5
45
A
Pinch-Off Voltage
V
P
V
DS
= 2 V; I
DS
= 4 mA
-0.25
-1.2
-2.0
V
Gate-Source Breakdown
Voltage Magnitude
|V
BDGS
|
I
GS
= 4 mA
-10
-12
V
Gate-Drain Breakdown
Voltage Magnitude
|V
BDGD
|
I
GD
= 4 mA
-10
-13
V
frequency=1.8 GHz
LP750SOT89
L
OW
N
OISE
,
H
IGH
L
INEARITY
P
ACKAGED
PHEMT
Phone: (408) 988-1845
http:// www.filss.com
Revised: 1/18/02
Fax: (408) 970-9950
Email: sales@filss.com
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Test Conditions
Min
Max
Units
Drain-Source Voltage
V
DS
T
Ambient
= 22
3
C
7
V
Gate-Source Voltage
V
GS
T
Ambient
= 22
3
C
-3
V
Drain-Source Current
I
DS
T
Ambient
= 22
3
C
I
DSS
mA
Gate Current
I
G
T
Ambient
= 22
3
C
7.5
mA
RF Input Power
P
IN
T
Ambient
= 22
3
C
175
mW
Channel Operating Temperature
T
CH
T
Ambient
= 22
3
C
175
C
Storage Temperature
T
STG
--
-65
175
C
Total Power Dissipation
P
TOT
T
Ambient
= 22
3
C
1.75
W
Notes:
Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
Power Dissipation defined as: P
TOT
(P
DC
+ P
IN
) P
OUT
, where
P
DC
: DC Bias Power
P
IN
: RF Input Power
P
OUT
: RF Output Power
Absolute Maximum Power Dissipation to be de-rated as follows above 25
C:
P
TOT
= 1.75W (0.012W/
C) x T
PACK
where T
PACK
= source tab lead temperature
This PHEMT is susceptible to damage from Electrostatic Discharge. Proper precautions should be used when handling these
devices.
OPTIMUM POWER OUTPUT MATCHING
Load State
Frequency (GHz)
Magnitude
Phase
1.8
0.39
-168
2.2
0.37
-147
2.5
0.43
-135
HANDLING PRECAUTIONS
To avoid damage to the devices care should be exercised during handling. Proper Electrostatic
Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and
testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control
measures can be found in MIL-STD-1686 and MIL-HDBK-263.
APPLICATIONS NOTES & DESIGN DATA
Applications Notes are available from your local Filtronic Sales Representative or directly from the
factory. Complete design data, including S-parameters, noise data, and large-signal models are
available on the Filtronic web site.
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