LP7512
U
LTRA
L
OW
N
OISE
PHEMT
Phone:
(408) 988-1845
http://
www.filss.com
Revised:
1/18/01
Fax:
(408) 970-9950
Email:
sales@filss.com
FEATURES
0.6 dB Noise Figure at 12 GHz
12 dB Associated Gain at 12 GHz
Low DC Power Consumption
Excellent Phase Noise
DESCRIPTION AND APPLICATIONS
The LP7512 is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)
Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-
write 0.25
m by 200
m Schottky barrier gate. The recessed "mushroom" gate structure minimizes
parasitic gate-source and gate resistances. The epitaxial structure and processing have been
optimized for ultra low noise and usable gain to 40 GHz. The LP7512 also features Si
3
N
4
passivation and is available in a variety of packages.
Typical applications include low noise receiver preamplifiers for commercial applications including
wireless systems and radio link systems.
ELECTRICAL SPECIFICATIONS @ T
Ambient
= 25C
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Saturated Drain-Source Current
I
DSS
V
DS
= 2 V; V
GS
= 0 V
15
35
50
mA
Noise Figure
NF
V
DS
= 2 V; I
DS
= 25% I
DSS
; f=12 GHz
f=18 GHz
0.6
1.0
0.9
1.4
dB
dB
Associated Gain at minimum
NF
G
A
V
DS
= 2 V; I
DS
= 25% I
DSS
; f=12 GHz
f=18 GHz
9
7.5
10
8.5
dB
dB
Transconductance
G
M
V
DS
= 2 V; V
GS
= 0 V
60
90
mS
Gate-Source Leakage Current
I
GSO
V
GS
= -3 V
1
10
A
Gate-Drain Leakage Current
I
GDO
V
GD
= -3 V
1
10
A
Pinch-Off Voltage
V
P
V
DS
= 2 V; I
DS
= 1 mA
-0.25
-0.8
-1.5
V
Thermal Resistivity
JC
325
C/W
frequency=18 GHz
DRAIN
BOND
PAD (2X)
SOURCE
BOND
PAD (2x)
DIE SIZE: 18.0X13.0 mils (460x330
m)
DIE THICKNESS: 3.9 mils (100
m)
BONDING PADS: 1.9X1.9 mils (50x50
m)
GATE
BOND
PAD (2X)
LP7512
U
LTRA
L
OW
N
OISE
PHEMT
Phone:
(408) 988-1845
http://
www.filss.com
Revised:
1/18/01
Fax:
(408) 970-9950
Email:
sales@filss.com
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Test Conditions
Min
Max
Units
Drain-Source Voltage
V
DS
T
Ambient
= 22
3
C
4
V
Gate-Source Voltage
V
GS
T
Ambient
= 22
3
C
-2
V
Drain-Source Current
I
DS
T
Ambient
= 22
3
C
I
DSS
mA
Gate Current
I
G
T
Ambient
= 22
3
C
5
mA
RF Input Power
P
IN
T
Ambient
= 22
3
C
50
mW
Channel Operating Temperature
T
CH
T
Ambient
= 22
3
C
175
C
Storage Temperature
T
STG
--
-65
175
C
Total Power Dissipation
P
TOT
T
Ambient
= 22
3
C
460
mW
Notes:
Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
Power Dissipation defined as: P
TOT
(P
DC
+ P
IN
) P
OUT
, where
P
DC
: DC Bias Power
P
IN
: RF Input Power
P
OUT
: RF Output Power
Absolute Maximum Power Dissipation to be de-rated as follows above 25
C:
P
TOT
= 460mW (3.1mW/
C) x T
HS
where T
HS
= heatsink or ambient temperature.
HANDLING PRECAUTIONS
To avoid damage to the devices care should be exercised during handling. Proper Electrostatic
Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and
testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control
measures can be found in MIL-STD-1686 and MIL-HDBK-263.
ASSEMBLY INSTRUCTIONS
The recommended die attach is gold/tin eutectic solder under a nitrogen atmosphere. Stage
temperature should be 280-290
C; maximum time at temperature is one minute. The recommended
wire bond method is thermo-compression wedge bonding with 0.7 or 1.0 mil (0.018 or 0.025 mm)
gold wire. Stage temperature should be 250-260
C.
APPLICATIONS NOTES & DESIGN DATA
Applications Notes are available from your local Filtronic Sales Representative or directly from the
factory. Complete design data, including S-parameters, noise data, and large-signal models are
available on the Filtronic web site.
All information and specifications are subject to change without notice.
PDF 
ZIP