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Электронный компонент: LP7512P70

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LP7512P70
P
ACKAGED
U
LTRA
L
OW
N
OISE
PHEMT
Phone:
(408) 988-1845
http://
www.filss.com
Revised:
1/20/01
Fax:
(408) 970-9950
Email:
sales@filss.com
FEATURES
0.7 dB Noise Figure at 12 GHz
12 dB Associated Gain at 12 GHz
0.4 dB Noise Figure at 2 GHz
18 dB Associated Gain at 2 GHz
Low DC Power Consumption: 30mW
DESCRIPTION AND APPLICATIONS
The LP7512P70 is a packaged Aluminum Gallium Arsenide / Indium Gallium Arsenide
(AlGaAs/InGaAs) Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an
Electron-Beam direct-write 0.25
m by 200
m Schottky barrier gate. The recessed "mushroom"
Ti/Pt/Au gate structure minimizes parasitic gate-source and gate resistances. The epitaxial structure
and processing have been optimized for optimum low noise performance. The LP7512's active
areas are passivated with Si
3
N
4
, and the P70 ceramic package is ideal for low-cost, high-performance
applications that require a surface-mount package.
Typical applications include low noise receiver preamplifiers in wireless systems.
ELECTRICAL SPECIFICATIONS @ T
Ambient
= 25C*
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Saturated Drain-Source Current**
I
DSS
V
DS
= 2 V; V
GS
= 0 V
15
30
mA
Noise Figure
NF
V
DS
= 2 V; I
DS
= 25% I
DSS
0.7
1.0
dB
Associated Gain at minimum NF
G
A
V
DS
= 2 V; I
DS
= 25% I
DSS
11
12
dB
Transconductance
G
M
V
DS
= 2 V; V
GS
= 0 V
60
90
mS
Gate-Source Leakage Current
I
GSO
V
GS
= -3 V
1
15
A
Gate-Drain Leakage Current
I
GDO
V
GS
= -3 V
1
15
A
Pinch-Off Voltage
V
P
V
DS
= 2 V; I
DS
= 1 mA
-0.2
-0.4
-1.5
V
*frequency=18 GHz, unless otherwise noted
**Formerly binned as: LP7512P70-1 = 15-30 mA and LP7512P702 = 31-50 mA
LP7512P70
P
ACKAGED
U
LTRA
L
OW
N
OISE
PHEMT
Phone:
(408) 988-1845
http://
www.filss.com
Revised:
1/20/01
Fax:
(408) 970-9950
Email:
sales@filss.com
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Test Conditions
Min
Max
Units
Drain-Source Voltage
V
DS
T
Ambient
= 22
3
C
4
V
Gate-Source Voltage
V
GS
T
Ambient
= 22
3
C
-2
V
Drain-Source Current
I
DS
T
Ambient
= 22
3
C
I
DSS
mA
Gate Current
I
G
T
Ambient
= 22
3
C
2
mA
RF Input Power
P
IN
T
Ambient
= 22
3
C
50
mW
Channel Operating Temperature
T
CH
T
Ambient
= 22
3
C
175
C
Storage Temperature
T
STG
--
-65
175
C
Total Power Dissipation
P
TOT
T
Ambient
= 22
3
C
300
mW
Notes:
Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
Power Dissipation defined as: P
TOT
(P
DC
+ P
IN
) P
OUT
, where
P
DC
: DC Bias Power
P
IN
: RF Input Power
P
OUT
: RF Output Power
Absolute Maximum Power Dissipation to be de-rated as follows above 25
C:
P
TOT
= 300mW (3.5mW/
C) x T
HS
where T
HS
= heatsink or ambient temperature.
This PHEMT is susceptible to damage from Electrostatic Discharge. Proper precautions should be used when handling these
devices.
HANDLING PRECAUTIONS
To avoid damage to the devices care should be exercised during handling. Proper Electrostatic
Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and
testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control
measures can be found in MIL-STD-1686 and MIL-HDBK-263.
APPLICATIONS NOTES & DESIGN DATA
Applications Notes are available from your local Filtronic Sales Representative or directly from the
factory. Complete design data, including S-parameters, noise data, and large-signal models are
available on the Filtronic web site.
LP7512P70
P
ACKAGED
U
LTRA
L
OW
N
OISE
PHEMT
Phone:
(408) 988-1845
http://
www.filss.com
Revised:
1/20/01
Fax:
(408) 970-9950
Email:
sales@filss.com
PACKAGE OUTLINE
(dimensions in mils)
All information and specifications are subject to change without notice.