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Электронный компонент: MRF5S9100MBR1

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MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
1
RF Device Data
Freescale Semiconductor
RF Power Field Effect Transistors
N-Channel Enhancement-Mode Lateral MOSFETs
Designed for broadband commercial and industrial applications with
frequencies up to 1000 MHz. The high gain and broadband performance of
these devices make them ideal for large - signal, common - source amplifier
applications in 26 volt base station equipment.
Typical Single-Carrier N-CDMA Performance @ 880 MHz, V
DD
= 26 Volts,
I
DQ
= 950 mA, P
out
= 20 Watts Avg., IS-95 CDMA (Pilot, Sync, Paging,
Traffic Codes 8 Through 13) Channel Bandwidth = 1.2288 MHz. PAR =
9.8 dB @ 0.01% Probability on CCDF.
Power Gain -- 19.5 dB
Drain Efficiency -- 28%
ACPR @ 750 kHz Offset -- -46.8 dBc @ 30 kHz Bandwidth
Capable of Handling 10:1 VSWR, @ 26 Vdc, 880 MHz, 100 Watts CW
Output Power
Characterized with Series Equivalent Large-Signal Impedance Parameters
Internally Matched for Ease of Use
Qualified Up to a Maximum of 32 V
DD
Operation
Integrated ESD Protection
N Suffix Indicates Lead-Free Terminations
200C Capable Plastic Package
In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel.
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain-Source Voltage
V
DSS
- 0.5, +68
Vdc
Gate-Source Voltage
V
GS
- 0.5, + 15
Vdc
Total Device Dissipation @ T
C
= 25C
Derate above 25C
P
D
336
1.92
W
W/C
Storage Temperature Range
T
stg
- 65 to +150
C
Operating Junction Temperature
T
J
200
C
Table 2. Thermal Characteristics
Characteristic
Symbol
Value
(1,2)
Unit
Thermal Resistance, Junction to Case
Case Temperature 80C, 20 W CW
R
JC
0.52
C/W
1. MTTF calculator available at http://www.freescale.com/rf. Select Tools/Software/Application Software/Calculators to access
the MTTF calculators by product.
2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes - AN1955.
NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Document Number: MRF5S9100
Rev. 3, 7/2005
Freescale Semiconductor
Technical Data
880 MHz, 20 W AVG., 26 V
SINGLE N-CDMA
LATERAL N-CHANNEL
RF POWER MOSFETs
MRF5S9100NR1
MRF5S9100NBR1
MRF5S9100MR1
MRF5S9100MBR1
CASE 1486-03, STYLE 1
TO-270 WB-4
PLASTIC
MRF5S9100NR1(MR1)
CASE 1484-02, STYLE 1
TO-272 WB-4
PLASTIC
MRF5S9100NBR1(MBR1)
Freescale Semiconductor, Inc., 2005. All rights reserved.
2
RF Device Data
Freescale Semiconductor
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
Table 3. ESD Protection Characteristics
Test Conditions
Class
Human Body Model (per JESD22-A114)
1C (Minimum)
Machine Model (per EIA/JESD22-A115)
A (Minimum)
Charge Device Model (per JESD22-C101)
IV (Minimum)
Table 4. Moisture Sensitivity Level
Test Methodology
Rating
Package Peak Temperature
Unit
Per JESD 22-A113, IPC/JEDEC J-STD-020
3
260
C
Table 5. Electrical Characteristics
(T
C
= 25C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Off Characteristics
Zero Gate Voltage Drain Leakage Current
(V
DS
= 68 Vdc, V
GS
= 0 Vdc)
I
DSS
--
--
10
Adc
Zero Gate Voltage Drain Leakage Current
(V
DS
= 26 Vdc, V
GS
= 0 Vdc)
I
DSS
--
--
1
Adc
Gate-Source Leakage Current
(V
GS
= 5 Vdc, V
DS
= 0 Vdc)
I
GSS
--
--
1
Adc
On Characteristics
Gate Threshold Voltage
(V
DS
= 10 Vdc, I
D
= 400 A)
V
GS(th)
2
2.8
3.5
Vdc
Gate Quiescent Voltage
(V
DS
= 26 Vdc, I
D
= 950 mAdc)
V
GS(Q)
--
3.7
--
Vdc
Drain-Source On-Voltage
(V
GS
= 10 Vdc, I
D
= 2.0 Adc)
V
DS(on)
--
0.21
0.3
Vdc
Forward Transconductance
(V
DS
= 10 Vdc, I
D
= 6 Adc)
g
fs
--
7
--
S
Dynamic Characteristics
(1)
Output Capacitance
(V
DS
= 26 Vdc 30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
C
oss
--
70
--
pF
Reverse Transfer Capacitance
(V
DS
= 26 Vdc 30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
C
rss
--
2.2
--
pF
Functional Tests (In Freescale Test Fixture, 50 ohm system) V
DD
= 26 Vdc, I
DQ
= 950 mA, P
out
= 20 W Avg. N-CDMA, f = 880 MHz,
Single-Carrier N-CDMA, 1.2288 MHz Channel Bandwidth Carrier. ACPR measured in 30 kHz Bandwidth @ 750 kHz Offset. PAR = 9.8 dB
@ 0.01% Probability on CCDF
Power Gain
G
ps
18
19.5
--
dB
Drain Efficiency
D
26
28
--
%
Adjacent Channel Power Ratio
ACPR
--
-46.8
-45
dBc
Input Return Loss
IRL
--
-19
-9
dB
1. Part is internally input matched.
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
3
RF Device Data
Freescale Semiconductor
Z1, Z15
0.200 x 0.080 Microstrip
Z2
0.105 x 0.080 Microstrip
Z3
0.954 x 0.080 Microstrip
Z4
0.115 x 0.220 Microstrip
Z5
0.375 x 0.220 Microstrip
Z6, Z11
0.200 x 0.220 x 0.620 Taper
Z7
0.152 x 0.620 Microstrip
Z8
0.163 x 0.620 Microstrip
Z9
0.238 x 0.620 Microstrip
Z10
0.077 x 0.620 Microstrip
Z12
0.381 x 0.220 Microstrip
Z13
0.114 x 0.220 Microstrip
Z14
1.052 x 0.080 Microstrip
PCB
Arlon GX0300, 0.030,
r
= 2.55
Figure 1. MRF5S9100NR1(NBR1)/MR1(MBR1) Test Circuit Schematic
RF
INPUT
RF
OUTPUT
C1
V
SUPPLY
Z15
V
BIAS
Z6
Z13
C12
C4
Z12
C8
C6
C7
Z8
DUT
Z5
C5
C10
C9
Z14
Z4
Z7
L1
Z1
Z2
C3
C2
Z3
C22
C21
+
+
L2
C18
C19
C20
+
C13
C14
+
+
C17
C16
C15
+
Z10
C11
Z9
B1
Z11
Table 6. MRF5S9100NR1(NBR1)/MR1(MBR1) Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
B1
Ferrite Bead, Surface Mount
2743019447
Fair-Rite
C1, C12, C18
18 pF Chip Capacitors
100B180JP 500X
ATC
C2
0.6-4.5 pF Variable Capacitor, Gigatrim
27271SL
Johanson Dielectrics
C3, C11
0.8-8.0 pF Variable Capacitors, Gigatrim
27291SL
Johanson Dielectrics
C4
6.2 pF Chip Capacitor
100B6R2JP 500X
ATC
C5, C6
12 pF Chip Capacitors
100B120JP 500X
ATC
C7, C8
11 pF Chip Capacitors
100B110JP 500X
ATC
C9, C10
5.1 pF Chip Capacitors
100B5R1JP 500X
ATC
C13
470 mF, 63 V Electrolytic Capacitor
NACZF471M63V
Nippon
C14, C15
22 mF, 50 V Tantalum Capacitors
T491X226K035AS
Kemet
C16, C17, C19
0.56 mF, 50 V Chip Capacitors
C1825C564J5GAC
Kemet
C20, C21
47 mF, 16 V Tantalum Capacitors
T491D4T6K016AS
Kemet
C22
100 mF, 50 V Electrolytic Capacitor
515D107M050BB6A
Multicomp
L1
7.15 nH Inductor
1606-7
CoilCraft
L2
22 nH Inductor
B07T-5
CoilCraft
4
RF Device Data
Freescale Semiconductor
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
Figure 2. MRF5S9100NR1(NBR1)/MR1(MBR1) Test Circuit Component Layout
WB2
WB1
V
GG
V
DD
C15 C14
C13
C12
C10
C9
C7
C11
C5
C3
C2
C1
C4
L1
L2
C17
C8
C6
C18
B1
C16
C19
C21 C20
C22
CUT
OUT

AREA
MRF9100M
Rev 2
Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the Freescale Semiconductor
signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have
no impact on form, fit or function of the current product.
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
5
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS
D
920
6
22
830
- 70
50
IRL
G
ps
ACPR
ALT
f, FREQUENCY (MHz)
Figure 3. IS-95 Broadband Performance @ P
out
= 20 Watts Avg.
G
ps
, POWER GAIN (dB)
V
DD
= 26 Vdc, P
out
= 20 W (Avg.), I
DQ
= 950 mA
N- CDMA IS- 95 (Pilot, Sync, Paging, Traffic
Codes 8 through 13)
- 30
- 10
- 20
- 15
INPUT
RETURN LOSS (dB)
IRL,
EFFICIENCY
(%)
ACPR (dBc),
AL
T
(dBc)
- 25
, DRAIN
D
20
40
18
30
16
20
14
- 30
12
- 40
10
- 50
8
- 60
840
850
860
870
880
890
900
910
D
920
6
22
830
- 80
10
IRL
G
ps
ACPR
ALT
f, FREQUENCY (MHz)
Figure 4. IS-95 Broadband Performance @ P
out
= 2 Watts Avg.
G
ps
, POWER GAIN (dB)
V
DD
= 26 Vdc, P
out
= 2 W (Avg.), I
DQ
= 950 mA
N- CDMA IS- 95 (Pilot, Sync, Paging, Traffic
Codes 8 through 13)
- 30
- 10
- 20
- 15
INPUT
RETURN LOSS (dB)
IRL,
EFFICIENCY
(%)
ACPR (dBc),
AL
T
(dBc)
- 25
, DRAIN
D
20
8
18
6
16
4
14
- 40
12
- 50
10
- 60
8
- 70
840
850
860
870
880
890
900
910
1000
16
21
0.1
I
DQ
= 1425 mA
1150 mA
P
out
, OUTPUT POWER (WATTS) PEP
Figure 5. Two-Tone Power Gain versus
Output Power
G
ps
, POWER GAIN (dB)
V
DD
= 26 Vdc, f1 = 880 MHz, f2 = 880.1 MHz
Two- Tone Measurements, 100 kHz Tone Spacing
475 mA
700 mA
950 mA
20
19
18
17
1
10
100
1000
- 70
- 20
0.1
I
DQ
= 475 mA
1425 mA
P
out
, OUTPUT POWER (WATTS) PEP
Figure 6. Third Order Intermodulation Distortion
versus Output Power
V
DD
= 26 Vdc, f1 = 880 MHz, f2 = 880.1 MHz
Two- Tone Measurements, 100 kHz Tone Spacing
950 mA
700 mA
1150 mA
- 25
- 30
- 35
- 40
- 45
- 50
- 55
- 60
- 65
1
10
100
IMD, THIRD
ORDER
INTERMODULA
TION DIST
OR
TION (dBc)
6
RF Device Data
Freescale Semiconductor
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
TYPICAL CHARACTERISTICS
100
- 70
0
0.1
7th Order
TWO- TONE SPACING (MHz)
Figure 7. Intermodulation Distortion Products
versus Tone Spacing
INTERMODULA
TION DIST
OR
TION (dBc)
IMD,
V
DD
= 26 Vdc, P
out
= 96 W (PEP), I
DQ
= 950 mA
Two- Tone Measurements, Center Frequency = 880 MHz
5th Order
3rd Order
1
10
- 10
- 20
- 30
- 40
- 50
- 60
38
48
58
28
P
in
, INPUT POWER (dBm)
Figure 8. Pulse CW Output Power versus
Input Power
57
56
55
54
53
52
51
50
49
29
30
31
32
33
34
35
36
37
, DRAIN EFFICIENCY

(%)
D
D
100
0
50
1
- 80
- 30
G
ps
ACPR
ALT1
P
out
, OUTPUT POWER (WATTS) AVG.
Figure 9. Single-Carrier N-CDMA ACPR, Power
Gain, Efficiency and ALT1 versus Output Power
V
DD
= 26 Vdc, I
DQ
= 950 mA, f = 880 MHz
N- CDMA IS- 95 (Pilot, Sync, Paging,
Traffic Codes 8 through 13)
G
ps
, POWER GAIN (dB)
ACPR,
ADJACENT
CHANNEL
POWER RA
TIO (dBc)
AL
T1, CHANNEL
POWER (dBm)
45
- 35
40
- 40
35
- 45
30
- 50
25
- 55
20
- 60
15
- 65
10
- 70
5
- 75
10
Ideal
P3dB = 51.58 dBm (143 W)
V
DD
= 26 Vdc, I
DQ
= 950 mA
Pulsed CW, 8
sec(on), 1 msec(off)
Center Frequency = 880 MHz
Actual
P1dB = 50.71 dBm (117 W)
180
17
20
0
V
DD
= 12 V
P
out
, OUTPUT POWER (WATTS) CW
Figure 10. Power Gain versus Output Power
G
ps
, POWER GAIN (dB)
I
DQ
= 950 mA
f = 880 MHz
16 V
20 V
24 V
32 V
19.5
19
18.5
18
17.5
30
60
90
120
150
220
10
10
80
T
J
, JUNCTION TEMPERATURE (
C)
This above graph displays calculated MTTF in hours x ampere
2
drain current. Life tests at elevated temperatures have correlated to
better than
10% of the theoretical prediction for metal failure. Divide
MTTF factor by I
D
2
for MTTF in a particular application.
100
120
140
160
180
10
9
10
7
10
8
Figure 11. MTTF Factor versus Junction Temperature
MTTF F
ACT
OR (HOURS x AMPS
2
)
200
P
out
, OUTPUT POWER (dBm)
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
7
RF Device Data
Freescale Semiconductor
Figure 12. Series Equivalent Source and Load Impedance
f
MHz
Z
source
Z
load
865
880
3.0 - j1.8
2.7 - j1.7
2.8 - j1.9
1.4 - j0.7
1.5 - j0.6
1.5 - j0.5
V
DD
=
26 Vdc, I
DQ
= 950 mA, P
out
= 20 W Avg.
Z
o
= 5
f = 895 MHz
f = 895 MHz
f = 865 MHz
f = 865 MHz
895
Z
load
Z
source
Z
source
= Test circuit impedance as measured from
gate to ground.
Z
load
= Test circuit impedance as measured
from drain to ground.
Z source
Z load
Input
Matching
Network
Device
Under Test
Output
Matching
Network
8
RF Device Data
Freescale Semiconductor
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
NOTES
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
9
RF Device Data
Freescale Semiconductor
NOTES
10
RF Device Data
Freescale Semiconductor
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
PACKAGE DIMENSIONS
TO-270 WB-4
PLASTIC
MRF5S9100NR1(MR1)
CASE 1486-03
ISSUE C
DATUM
PLANE
BOTTOM VIEW
A1
2X
D1
E3
E1
D3
E4
A2
PIN 5
NOTE 8
A
B
C
H
DRAIN LEAD
D
A
M
aaa
C
4X
b1
2X
D2
NOTES:
1. CONTROLLING DIMENSION: INCH.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M-1994.
3. DATUM PLANE -H- IS LOCATED AT THE TOP OF
LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE TOP OF THE PARTING LINE.
4. DIMENSIONS
"D" AND "E1" DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE PROTRUSION
IS .006 PER SIDE. DIMENSIONS
"D" AND "E1" DO
INCLUDE MOLD MISMATCH AND ARE DETER-
MINED AT DATUM PLANE -H-.
5. DIMENSION
"b1" DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE .005 TOTAL IN EXCESS
OF THE
"b1" DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. DATUMS -A- AND -B- TO BE DETERMINED AT
DATUM PLANE -H-.
7. DIMENSION A2 APPLIES WITHIN ZONE
"J" ONLY.
8. HATCHING REPRESENTS THE EXPOSED AREA
OF THE HEAT SLUG.
c1
F
ZONE J
E2
2X
A
DIM
A
MIN
MAX
MIN
MAX
MILLIMETERS
.100
.104
2.54
2.64
INCHES
A1
.039
.043
0.99
1.09
A2
.040
.042
1.02
1.07
D
.712
.720
18.08
18.29
D1
.688
.692
17.48
17.58
D2
.011
.019
0.28
0.48
D3
.600
- - -
15.24
- - -
E
.551
.559
14
14.2
E1
.353
.357
8.97
9.07
E2
.132
.140
3.35
3.56
E3
.124
.132
3.15
3.35
E4
.270
- - -
6.86
- - -
F
b1
.164
.170
4.17
4.32
c1
.007
.011
0.18
0.28
e
.025 BSC
.106 BSC
0.64 BSC
2.69 BSC
1
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. GATE
5. SOURCE
aaa
.004
0.10
GATE LEAD
4X
e
2X
E
SEATING
PLANE
4
2
3
NOTE 7
E5
E5
E5
.346
.350
8.79
8.89
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
11
RF Device Data
Freescale Semiconductor
TO-272 WB-4
PLASTIC
MRF5S9100NBR1(MBR1)
CASE 1484-02
ISSUE B
NOTES:
1. CONTROLLING DIMENSION: INCH.
2. INTERPRET DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994.
3. DATUM PLANE -H- IS LOCATED AT TOP OF LEAD
AND IS COINCIDENT WITH THE LEAD WHERE THE
LEAD EXITS THE PLASTIC BODY AT THE TOP OF
THE PARTING LINE.
4. DIMENSIONS "D" AND "E1" DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE PROTRUSION
IS .006 PER SIDE. DIMENSIONS "D" AND "E1" DO
INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE -H-.
5. DIMENSION "b1" DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE .005 TOTAL IN EXCESS
OF THE "b1" DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. DATUMS -A- AND -B- TO BE DETERMINED AT
DATUM PLANE -H-.
7. DIMENSION A2 APPLIES WITHIN ZONE "J" ONLY.
8. HATCHING REPRESENTS THE EXPOSED AREA OF
THE HEAT SLUG.
DATUM
PLANE
Y
Y
DIM
A
MIN
MAX
MIN
MAX
MILLIMETERS
.100
.104
2.54
2.64
INCHES
D2
.600
- - -
15.24
- - -
E2
.270
- - -
6.86
- - -
D
.928
.932
23.57
23.67
D1
E
.551
.559
14
14.2
E1
.353
.357
8.97
9.07
b1
.164
.170
4.17
4.32
c1
.007
.011
.18
.28
e
r1
.063
.068
1.60
1.73
aaa
.106 BSC
.004
2.69 BSC
.10
B
A
E1
D
4X
b1
D1
E
GATE LEAD
M
aaa
C A
M
aaa
C A
D2
E2
VIEW Y-Y
4X
e
A1
.039
.043
0.99
1.09
F
A2
.040
.042
1.02
1.07
.025 BSC
0.64 BSC
A1
C
H
c1
A
ZONE J
SEATING
PLANE
.810 BSC
20.57 BSC
PIN 5
2X
r1
B
DRAIN LEAD
F
A2
7
NOTE 8
1
2
3
4
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. GATE
5. SOURCE
E3
E3
E3
.346
.350
8.79
8.89
12
RF Device Data
Freescale Semiconductor
MRF5S9100NR1 MRF5S9100NBR1 MRF5S9100MR1 MRF5S9100MBR1
Information in this document is provided solely to enable system and software
implementers to use Freescale Semiconductor products. There are no express or
implied copyright licenses granted hereunder to design or fabricate any integrated
circuits or integrated circuits based on the information in this document.
Freescale Semiconductor reserves the right to make changes without further notice to
any products herein. Freescale Semiconductor makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does
Freescale Semiconductor assume any liability arising out of the application or use of
any product or circuit, and specifically disclaims any and all liability, including without
limitation consequential or incidental damages. "Typical" parameters that may be
provided in Freescale Semiconductor data sheets and/or specifications can and do
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Document Number: MRF5S9100
Rev. 3, 7/2005