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Электронный компонент: MB86391

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MB86391 12, November 2001
Product Specification
Rev. 1.1
MPEG2 1chip Audio/Video Encoder
MB86391 Product Specification
Revision 1.1
12, November 2001
Copyright FUJITSU LIMITED
ALL RIGHTS RESERVED
FUJITSU LIMITED
Proprietary and Confidential
MB86391 12, November 2001
Product Specification
Rev. 1.1
u
Information contained in this specification is subject to change without notice for improvement.
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No part of this specification may be reproduced or transmitted in any form or by any means for any purpose
without the express written permission of Fujitsu Ltd.
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The furnishing of this specification does not give users any license to Fujitsu's industrial property rights.
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Fujitsu is not liable for infringement of third party patent rights, industrial property rights, or other rights that
might result from the use of contents provided in this specification.
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Use of product in any manner that complies with the MPEG-2 standard is expressly prohibited without a license
under applicable patents in the MPEG-2 patent portfolio, which license is available from
MPEG LA, L.L.C., 250 steele street, suite 300, Denver, Colorado, USA 80206
FUJITSU LIMITED
Proprietary and Confidential
MB86391 12, November 2001
Product Specification
Rev. 1.1
Contents
1 Overview ......................................................................................................................................... 1
1.1 Product Overview ...................................................................................................................... 1
1.2 System Configuration................................................................................................................. 2
1.3 Specification Overview ............................................................................................................... 3
1.3.1 Major Items................................................................................................................... 3
1.3.2 Function List ................................................................................................................. 3
1.3.3 Package....................................................................................................................... 4
1.4 Block Diagram .......................................................................................................................... 5
2 Pin Description................................................................................................................................. 6
2.1 I/O Signals ............................................................................................................................... 6
2.2 Pin Arrangement ....................................................................................................................... 7
2.2.1 Pin Arrangement Diagram............................................................................................... 7
2.2.2 Pin Numbers ................................................................................................................. 8
2.3 Pin Functions............................................................................................................................ 9
2.3.1 Overall Control .............................................................................................................. 9
2.3.2 Host/SDRAM interface.................................................................................................. 10
2.3.3 Serial Interface...........................................................................................................111
2.3.4 SDRAM Interface for Video Encoding............................................................................122
2.3.5 Video Input Interface...................................................................................................133
2.3.6 Audio Input Interface...................................................................................................144
2.3.7 Bit Stream Output Port.................................................................................................155
2.3.8 Test Signals...............................................................................................................166
3 Functional Description....................................................................................................................177
3.1 Host/SDRAM Interface............................................................................................................177
3.1.1 Access by External Master...........................................................................................188
3.1.1.1 MB86391 Internal Resource Accessing..............................................................188
3.1.1.2 SDRAM Accessing........................................................................................... 20
3.1.1.3 External Resource Accessing...........................................................................244
3.1.2 Internal Controller Master Accessing .............................................................................266
3.1.2.1 External Resource Accessing...........................................................................266
3.1.2.2 External Boot ROM Read.................................................................................288
3.1.3 Interruption ................................................................................................................299
3.1.3.1 Internal Controller Interrupt Input (IRQ9:8)..........................................................299
3.1.3.2 Host Interrupt Output (XEXTIRPT) ....................................................................299
3.1.4 Address Map............................................................................................................... 30
3.2 Serial Interface.......................................................................................................................311
FUJITSU LIMITED
Proprietary and Confidential
MB86391 12, November 2001
Product Specification
Rev. 1.1
3.2.1 Serial Interface Receive Operations ..............................................................................311
3.2.2 Serial Interface Send Operations ..................................................................................322
3.3 SDRAM Interface for Video Encoding........................................................................................333
3.4 Video Input Interface...............................................................................................................344
3.4.1 Input Formats.............................................................................................................355
3.5 Audio Input Interface...............................................................................................................366
3.5.1 Master/Slave Mode...................................................................................................... 37
3.5.2 Input Formats.............................................................................................................377
3.6 Bit Stream Output Port ............................................................................................................388
3.7 Error Notification Function .......................................................................................................411
3.8 Boot Operations.....................................................................................................................422
3.8.1 Downloading from the External ROM.............................................................................433
3.8.2 Serial Download .......................................................................................................... 43
3.8.3 Direct SDRAM Downloading.........................................................................................433
4 Electrical Characteristics (Provisional Target Specifications)................................................................444
4.1 Maximum Ratings...................................................................................................................444
4.2 Recommended Operating Conditions......................................................................................... 45
4.2.1 Recommended Operating Conditions ............................................................................. 45
4.2.2 Precautions When Connecting the Power ....................................................................... 45
4.3 DC Characteristics .................................................................................................................. 46
4.4 AC Characteristics................................................................................................................... 47
4.4.1 Overall Control ............................................................................................................ 47
4.4.1.1 Clock Input...................................................................................................... 47
4.4.1.2 Reset Input ..................................................................................................... 48
4.4.2 Host/SDRAM Interface................................................................................................. 49
4.4.2.1 Host Interface.................................................................................................. 49
4.4.2.2 SDRAM Interface Signals ................................................................................. 52
4.4.3 Serial Interface............................................................................................................ 54
4.4.4 SDRAM Interface for Video Encoding............................................................................. 56
4.4.5 Video Input Interface.................................................................................................... 58
4.4.6 Audio Input Interface.................................................................................................... 59
4.4.7 Bit Stream Output Port.................................................................................................. 63
FUJITSU LIMITED
Proprietary and Confidential
MB86391 12, November 2001
Product Specification
Rev. 1.1
1
1 Overview
1.1 Product Overview
The MB86391 (MPEG2 1chip Audio/Video Encoder) is an LSI that accomplishes all of video encoding, audio
encoding, and video and audio encode stream data multiplexing with a single chip rather than several LSIs as
in the past. This LSI enables you to minimize the size, cost and power consumption of MPEG2 application
systems, such as digital video recorders.
An easy control command interface is achieved by firmware dedicated to the internal controller.