Genesis Microchip Inc.
165 Commerce Valley Dr. West
Thornhill ON Canada L3T 7V8 Tel: (905) 889-5400 Fax: (905) 889-5422
2150 Gold Street
PO Box 2150 Alviso CA USA 95002 Tel: (408) 262-6599 Fax: (408) 262-6365
4F, No. 24, Ln 123, Sec 6, Min-Chung E. Rd.
Taipei Taiwan Tel: (2) 2791-0118 Fax: (2) 2791-0196
143-37 Hyundai Tower
Unit 902 Samsung-dong Kangnam-gu Seoul Korea 135-090 Tel: (82-2) 553-5693 Fax: (82-2) 552-4942
www.genesis-microchip.com / info@genesis-microchip.com
.com
Genesis Microchip Publication
PRELIMINARY DATA SHEET
gm2121
SXGA LCD Monitor Controller with
Integrated Analog Interface and Dual
LVDS Transmitter
Publication Number: C2121-DAT-01F
Publication Date: December 2002
Copyright 2002 Genesis Microchip Inc. All Rights Reserved.
Genesis Microchip Inc. reserves the right to change or modify the information contained herein without notice. It is
the customer's responsibility to obtain the most recent revision of the document. Genesis Microchip Inc. makes no
warranty for the use of its products and bears no responsibility for any errors or omissions that may appear in this
document.
The following are trademarks or registered trademarks of Genesis Microchip, Inc.:
Genesis
TM
, Genesis Display Perfection
TM
, ESM
TM
, RealColor
TM
, Ultra-Reliable DVI
TM
, Real Recovery
TM
, Sage
TM
, JagASM
TM
,
SureSync
TM
, Adaptive Backlight ControlTM, Faroudja
TM
, DCDi
TM
, TrueLife
TM
, IntelliComb
TM
Other brand or product names are trademarks of their respective holders.
gm2121 Preliminary Data Sheet
C2121-DAT-01F
3
December 2002
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Table Of Contents
1
Overview ........................................................................................................................................8
1.1
gm2121 System Design Example..........................................................................................8
1.2
gm2121 Features ...................................................................................................................9
2
GM2121 Pinout ............................................................................................................................10
3
GM2121Pin List...........................................................................................................................11
4
Functional Description .................................................................................................................16
4.1
Clock Generation.................................................................................................................16
4.1.1
Using the Internal Oscillator with External Crystal ........................................................17
4.1.2
Using an External Clock Oscillator.................................................................................19
4.1.3
Clock Synthesis ...............................................................................................................20
4.2
Chip Initialization................................................................................................................21
4.2.1
Hardware Reset ...............................................................................................................21
4.2.2
Correct Power Sequencing ..............................................................................................22
4.3
Analog to Digital Converter ................................................................................................22
4.3.1
ADC Pin Connection.......................................................................................................23
4.3.2
ADC Characteristics........................................................................................................23
4.3.3
Clock Recovery Circuit...................................................................................................24
4.3.4
Sampling Phase Adjustment............................................................................................25
4.3.5
ADC Capture Window ....................................................................................................25
4.4
Test Pattern Generator (TPG)..............................................................................................26
4.5
Input Format Measurement .................................................................................................26
4.5.1
HSYNC / VSYNC Delay ................................................................................................27
4.5.2
Horizontal and Vertical Measurement ............................................................................28
4.5.3
Format Change Detection................................................................................................28
4.5.4
Watchdog ........................................................................................................................28
4.5.5
Internal Odd/Even Field Detection (For Interlaced Inputs to ADC Only) ......................28
4.5.6
Input Pixel Measurement ................................................................................................29
4.5.7
Image Phase Measurement..............................................................................................29
4.5.8
Image Boundary Detection..............................................................................................29
4.5.9
Image Auto Balance ........................................................................................................29
4.6
RealColor
TM
Digital Color Controls....................................................................................29
4.6.1
RealColorTM Flesh tone Adjustment ...............................................................................30
4.6.2
Color Standardization and sRGB Support.......................................................................30
4.7
High-Quality Scaling...........................................................................................................30
4.7.1
Variable Zoom Scaling....................................................................................................30
gm2121 Preliminary Data Sheet
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4.7.2
Horizontal and Vertical Shrink........................................................................................30
4.8
Bypass Options....................................................................................................................30
4.9
Gamma LUT........................................................................................................................31
4.10
Display Output Interface .....................................................................................................31
4.10.1
Display Synchronization.............................................................................................31
4.10.2
Programming the Display Timing ..............................................................................31
4.10.3
Panel Power Sequencing (PPWR, PBIAS).................................................................33
4.10.4
Output Dithering .........................................................................................................33
4.11
Dual Four Channel LVDS Transmitter ...............................................................................34
4.12
Energy Spectrum Management (ESM)................................................................................34
4.13
OSD .....................................................................................................................................34
4.13.1
On-Chip OSD SRAM .................................................................................................35
4.13.2
Color Look-up Table (LUT) .......................................................................................36
4.14
On-Chip Microcontroller (OCM) ........................................................................................36
4.14.1
Standalone Configuration ...........................................................................................37
4.14.2
Full-Custom Configuration.........................................................................................38
4.14.3
In-System-Programming (ISP) of FLASH ROM Devices .........................................39
4.14.4
UART Interface ..........................................................................................................39
4.14.5
DDC2Bi Interface .......................................................................................................40
4.14.6
General Purpose Inputs and Outputs (GPIO's)...........................................................40
4.15
Bootstrap Configuration Pins ..............................................................................................41
4.16
Host Interface ......................................................................................................................42
4.16.1
Host Interface Command Format................................................................................42
4.16.2
2-wire Serial Protocol .................................................................................................43
4.17
Miscellaneous Functions .....................................................................................................44
4.17.1
Low Power State.........................................................................................................44
4.17.2
Pulse Width Modulation (PWM) Back Light Control ................................................45
5
Electrical Specifications ...............................................................................................................46
5.1
Preliminary DC Characteristics...........................................................................................46
5.2
Preliminary AC Characteristics...........................................................................................48
5.3
External ROM Interface Timing Requirements ..................................................................49
6
Ordering Information ...................................................................................................................50
7
Mechanical Specifications............................................................................................................51
gm2121 Preliminary Data Sheet
C2121-DAT-01F
5
December 2002
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List Of Tables
Table 1.
Analog Input Port ................................................................................................................11
Table 2.
RCLK PLL Pins ..................................................................................................................11
Table 3.
System Interface and GPIO Signals ....................................................................................12
Table 4.
Display Output Port.............................................................................................................13
Table 5.
Parallel ROM Interface Port................................................................................................13
Table 6.
Reserved Pins ...................................................................................................................14
Table 7.
Power and Ground Pins for ADC Sampling Clock DDS ....................................................14
Table 8.
Power and Ground Pins for Display Clock DDS ................................................................14
Table 9.
I/O Power and Ground Pins.................................................................................................15
Table 10.
Power and Ground Pins for LVDS Transmitter ..............................................................15
Table 11.
TCLK Specification ........................................................................................................19
Table 12.
Pin Connection for RGB Input with HSYNC/VSYNC...................................................23
Table 13.
ADC Characteristics........................................................................................................24
Table 14.
Supported LVDS 24-bit Panel Data Mapping.................................................................34
Table 15.
Supported LVDS 18-bit Panel Data Mapping.................................................................34
Table 16.
gm2121 GPIOs and Alternative Functions .....................................................................41
Table 17.
Bootstrap Signals.............................................................................................................41
Table 18.
Instruction Byte Map.......................................................................................................43
Table 19.
Absolute Maximum Ratings............................................................................................46
Table 20.
DC Characteristics...........................................................................................................47
Table 21.
Maximum Speed of Operation ........................................................................................48
Table 22.
Display Timing and DCLK Adjustments........................................................................48
Table 23.
2-Wire Host Interface Port Timing .................................................................................48
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