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Электронный компонент: gm2125

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PRELIMINARY DATA SHEET
gm2115/25
Analog Interface XGA/SXGA OnPanel
LCD Panel Controller
*** Genesis Microchip Confidential ***

C2115-DAT-01B
June 2002
Genesis Microchip Inc.
2150 Gold Street, Alviso, P.O. Box 2150, CA USA 95002 Tel: (408) 262-6599 Fax: (408) 262-6365
165 Commerce Valley Dr. West, Thornhill, ON Canada L3T 7V8 Tel: (905) 889-5400 Fax: (905) 889-5422
1096, 12thA Main, Hal II Stage, Indira Nagar, Bangalore-560 008, India, Tel: (91)-80-526-3878, Fax: (91)-80-529-6245
4F, No. 24, Ln 123, Sec 6, Min-Chuan E. Rd., Taipei, Taiwan, ROC Tel: 886-2-2791-0118 Fax: 886-2-2791-0196
143-37 Hyundai Tower, #902, Samsung-dong, Kangnam-gu, Seoul, Korea 135-090 Tel 82-2-553-5693 Fax 82-2-552-4942
Rm2614-2618 Shenzhen Office Tower, 6007 Shennan Blvd, 518040, Shenzhen, Guandong, P.R.C., Tel (0755)386-0101, Fax (0755)386-7874
2-9-5 Higashigotanda, Shinagawa-ku, Tokyo, 141-0022, Japan, Tel 81-3-5798-2758, Fax 81-3-5798-2759
www.genesis-microchip.com / info@genesis-microchip.com
***
Genesis Microchip Confidential ***
gm2115/25 Preliminary Data Sheet
Revision History
Document
Description
Date
C2115-DAT-01A Initial release.
August 2001
D2115-DAT-01B
Pins 143 ~ 146: changed xxx_SDDS or xxxx_SDDS to xxx_DDDS or xxxx_DDDS
respectively
Pins 138 ~ 141: changed xxx_DDDS or xxxx_DDDS to xxx_SDDS or xxxx_SDDS
respectively
Pins 147 ~ 148: changed xxx_DPLL to xxx_RPLL
June 2002
Trademarks: RealColor and Real Recovery are trademarks of Genesis Microchip Inc.
Copyright 2001, Genesis Microchip Inc. All Rights Reserved.
Genesis Microchip Inc. reserves the right to change or modify the information contained herein without
notice. Please obtain the most recent revision of this document. Genesis Microchip Inc. makes no warranty
for the use of its products and bears no responsibility for any errors or omissions that may appear.
***
Genesis Microchip Confidential ***
gm2115/25 Preliminary Data Sheet
June 2002
C2115-DAT-01B
1
Table Of Contents
1. Overview ............................................................................................................................................ 5
1.1 gm2115/25 System Design Example ........................................................................................... 5
1.2 gm2115/25 Features..................................................................................................................... 6
2. gm2115/25 Pinout .............................................................................................................................. 7
3. gm2115/25 Pin List ............................................................................................................................ 8
4. Functional Description ..................................................................................................................... 14
4.1 Clock Generation ....................................................................................................................... 14
4.1.1 Using the Internal Oscillator with External Crystal............................................................ 15
4.1.2 Using an External Clock Oscillator .................................................................................... 17
4.1.3 Clock Synthesis................................................................................................................... 18
4.2 Hardware Reset.......................................................................................................................... 20
4.3 Analog to Digital Converter (ADC)........................................................................................... 20
4.3.1 ADC Pin Connection .......................................................................................................... 21
4.3.2 ADC Characteristics ........................................................................................................... 21
4.3.3 Clock Recovery Circuit ...................................................................................................... 22
4.3.4 Sampling Phase Adjustment ............................................................................................... 23
4.3.5 ADC Capture Window........................................................................................................ 23
4.4 Test Pattern Generator (TPG) .................................................................................................... 24
4.5 Input Format Measurement (IFM) ............................................................................................. 24
4.5.1 HSYNC / VSYNC Delay.................................................................................................... 24
4.5.2 Horizontal and Vertical Measurement ................................................................................ 25
4.5.3 Format Change Detection ................................................................................................... 26
4.5.4 Watchdog............................................................................................................................ 26
4.5.5 Internal Odd/Even Field Detection ..................................................................................... 26
4.5.6 Input Pixel Measurement .................................................................................................... 27
4.5.7 Image Phase Measurement ................................................................................................. 27
4.5.8 Image Boundary Detection ................................................................................................. 27
4.5.9 Image Auto Balance............................................................................................................ 27
4.6 RealColor Digital Color Controls .............................................................................................. 27
4.6.1 RealColor Flesh tone Adjustment....................................................................................... 28
4.6.2 Color Standardization and sRGB Support .......................................................................... 28
4.7 High-Quality Scaling ................................................................................................................. 28
4.7.1 Variable Zoom Scaling ....................................................................................................... 28
4.7.2 Horizontal and Vertical Shrink ........................................................................................... 29
4.7.3 Moir Cancellation ............................................................................................................. 29
4.8 Bypass Options .......................................................................................................................... 29
4.9 Gamma Look-Up-Table (LUT) ................................................................................................. 29
***
Genesis Microchip Confidential ***
gm2115/25 Preliminary Data Sheet
June 2002
C2115-DAT-01B
2
4.10 Display Output Interface.......................................................................................................... 29
4.10.1 Display Synchronization................................................................................................... 30
4.10.2 Programming the Display Timing .................................................................................... 30
4.10.3 Panel Power Sequencing (PPWR, PBIAS)....................................................................... 32
4.10.4 Output Dithering ............................................................................................................... 32
4.11 Timing Controller (TCON)...................................................................................................... 33
4.11.1 Programmable Column Driver Interface .......................................................................... 33
4.11.2 Programmable Row Driver Interface................................................................................ 36
4.11.3 Reduced EMI .................................................................................................................... 36
4.12 OSD.......................................................................................................................................... 38
4.12.1 On-Chip OSD SRAM ....................................................................................................... 38
4.12.2 Color Look-up Table (LUT) ............................................................................................. 39
4.12.3 OSD Position .................................................................................................................... 39
4.12.4 OSD Stretch ...................................................................................................................... 39
4.12.5 Blending............................................................................................................................ 39
4.13 On-Chip Microcontroller (OCM)............................................................................................. 40
4.13.1 Standalone Configuration ................................................................................................. 40
4.13.2 Full-Custom Configuration............................................................................................... 41
4.13.3 General Purpose Inputs and Outputs (GPIO).................................................................... 42
4.14 Bootstrap Configuration Pins................................................................................................... 43
4.15 Host Interface........................................................................................................................... 44
4.15.1 Host Interface Command Format...................................................................................... 44
4.15.2 2-wire Serial Protocol ....................................................................................................... 45
4.16 Miscellaneous Functions.......................................................................................................... 47
4.16.1 Power Down Operation .................................................................................................... 47
4.16.2 Pulse Width Modulation (PWM) Back Light Control ...................................................... 47
5. Electrical Specifications ................................................................................................................... 48
5.1 Preliminary DC Characteristics ................................................................................................. 48
5.2 Preliminary AC Characteristics ................................................................................................. 49
6. Ordering Information ....................................................................................................................... 51
7. Mechanical Specifications................................................................................................................ 52
***
Genesis Microchip Confidential ***
gm2115/25 Preliminary Data Sheet
June 2002
C2115-DAT-01B
3
List Of Tables
Table 1. Analog Input Port.......................................................................................................8
Table 2. RCLK PLL Pins.........................................................................................................8
Table 3. System Interface and GPIO Signals...........................................................................9
Table 4. Display Output Port .................................................................................................10
Table 5. Parallel ROM Interface Port ....................................................................................11
Table 6. TCON Output Port...................................................................................................11
Table 7. Reserved Pins...........................................................................................................11
Table 8. Power Pins for ADC Sampling Clock DDS ............................................................13
Table 9. Power Pins for Display Clock DDS.........................................................................13
Table 10. I/O Power and Ground Pins .....................................................................................13
Table 11. Core Power and Ground Pins...................................................................................13
Table 12. TCLK Specification.................................................................................................18
Table 13. Pin Connection for RGB Input with HSYNC/VSYNC ...........................................21
Table 14. ADC Characteristics ................................................................................................22
Table 15. gm2115/25 GPIOs and Alternate Functions............................................................43
Table 16. Bootstrap Signals .....................................................................................................43
Table 17. Instruction Byte Map ...............................................................................................45
Table 18. Absolute Maximum Ratings ....................................................................................48
Table 19. DC Characteristics ...................................................................................................49
Table 20. Maximum Speed of Operation.................................................................................50
Table 21. Display Timing and DCLK Adjustments ................................................................50
Table 22. 2-Wire Host Interface Port Timing..........................................................................50