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Электронный компонент: GS1535ACFUE3

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GS1535A / GS9065A HD-LINX II
Multi-Rate SDI Automatic Reclocker
GS1535A / GS9065A Data Sheet
31497 - 3
November 2005
1 of 27
Features
GS1535A
SMPTE 292M, 259M and 344M compliant
Supports data rates of 143, 177, 270, 360, 540, 1483.5,
1485 Mb/s
Supports DVB-ASI at 270Mb/s
Pb-free and RoHS Compliant
Footprint compatible with the GS1535, GS9065 and
GS9065A Automatic Reclockers
Auto and Manual Modes for rate selection
Standards indication in Auto Mode
4:1 input multiplexer
Lock Detect Output
On-chip Input and Output Termination
Differential 50
inputs and outputs
Mute, Bypass and Autobypass functions
SD/HD indication output to control GS1528A Dual
Slew-Rate Cable Driver
Single 3.3V power supply
Operating temperature range: 0C to 70C
GS9065A
SMPTE 259M and 344M compliant
Supports data rates of 143, 177, 270, 360, and 540Mb/s
Supports DVB-ASI at 270Mb/s
Pb-free and RoHS Compliant
Footprint compatible with the GS1535, GS9065 and
GS1535A Automatic Reclockers
Auto and Manual Modes for rate selection
Standards indication in Auto Mode
4:1 input multiplexer
Lock Detect Output
On-chip Input and Output Termination
Differential 50
inputs and outputs
Mute, Bypass and Autobypass functions
Single 3.3V power supply
Operating temperature range: 0C to 70C
Applications
GS1535A
SMPTE 292M, SMPTE 259M and SMPTE 344M Serial
Digital Interfaces
GS9065A
SMPTE 259M and SMPTE 344M Serial Digital Interfaces.
Description
The GS1535A/9065A is a Multi-Rate Serial Digital
Reclocker designed to automatically recover the
embedded clock from a digital video signal and re-time
the incoming video data.
The GS1535A Serial Digital Reclocker will recover the
embedded clock signal and re-time the data from a
SMPTE 292M, SMPTE 259M or SMPTE 344M
compliant digital video signal.
The GS9065A Serial Digital Reclocker will recover the
embedded clock signal and re-time the data from a
SMPTE 259M or SMPTE 344M compliant digital video
signal.
The GS1535A/9065A removes the high frequency jitter
components from the bit-serial stream. Input
termination is on-chip for seamless matching to 50
transmission lines. An LVPECL compliant output
interfaces seamlessly to the GS1528A/9068A Cable
Driver.
The GS1535A/9065A can operate in either auto or
manual rate selection mode. In Auto mode the device
will automatically detect and lock onto incoming SMPTE
SDI data signals at any supported rate. For single rate
data systems, the GS1535A/9065A can be configured
to operate in Manual mode. In both modes, the device
requires only one external crystal to set the VCO
frequency when not locked and provides adjustment
free operation.
In systems which require passing of non-SMPTE data
rates, the GS1535A/9065A can be configured to either
automatically or manually enter a bypass mode in order
to pass the signal without reclocking.
The ASI/177 input pin allows for manual selection of
support of either 177Mb/s or DVB-ASI inputs.
The GS1535A/9065A is Pb-free, and the encapsulation
compound does not contain halogenated flame
retardant (RoHS Compliant).
GS1535A / GS9065A Data Sheet
31497 - 3
November 2005
2 of 27
GS1535A Functional Block Diagram
GS9065A Functional Block Diagram
XTAL+ XTAL-
XTAL
OUT-
XTAL
OUT+
DDI_SEL[1:0]
DDI 1
DDI 2
DDI 3
DDI 0
LF+ LF-
KBB
DDO_MUTE
DDO/DDO
AUTOBYPASS
BYPASS
LD
AUTO/MAN
SS[2:0]
ASI/177
XTAL
OSC
BUFFER
DATA BUFFER
VCO
BYPASS
LOGIC
DIVIDE BY
2,4,6,8,12,16
PHASE
FREQUENCY
DETECTOR
DIVIDE BY
152, 160, 208
CONTROL LOGIC
CHARGE
PUMP
M
U
X
D
A
T
A
M
U
X
M
U
X
RE-TIMER
PHASE
DETECTOR
SD/HD
XTAL+ XTAL-
XTAL
OUT-
XTAL
OUT+
DDI_SEL[1:0]
DDI 1
DDI 2
DDI 3
DDI 0
LF+ LF-
KBB
DDO_MUTE
DDO/DDO
AUTOBYPASS
BYPASS
LD
AUTO/MAN
SS[2:0]
ASI/177
XTAL
OSC
BUFFER
DATA BUFFER
VCO
BYPASS
LOGIC
DIVIDE BY
2,4,6,8,12
PHASE
FREQUENCY
DETECTOR
DIVIDE BY
152, 160
CONTROL LOGIC
CHARGE
PUMP
M
U
X
D
A
T
A
M
U
X
M
U
X
RE-TIMER
PHASE
DETECTOR
SD
GS1535A / GS9065A Data Sheet
31497 - 3
November 2005
3 of 27
Contents
Features ........................................................................................................................1
Applications...................................................................................................................1
Description ....................................................................................................................1
1. Pin Out ......................................................................................................................4
1.1 GS1535A Pin Assignment ..............................................................................4
1.2 GS9065A Pin Assignment ..............................................................................5
1.3 GS1535A / GS9065A Pin Descriptions ...........................................................6
2. Electrical Characteristics...........................................................................................9
2.1 Absolute Maximum Ratings ............................................................................9
2.2 DC Electrical Characteristics ..........................................................................9
2.3 AC Electrical Characteristics .........................................................................10
2.4 Solder Reflow Profiles ...................................................................................12
3. Input / Output Circuits .............................................................................................13
4. Detailed Description ................................................................................................17
4.1 Slew Rate Phase Lock Loop (S-PLL) ...........................................................17
4.2 VCO ..............................................................................................................18
4.3 Charge Pump ................................................................................................18
4.4 Frequency Acquisition Loop -- The Phase-Frequency Detector ..................19
4.5 Phase Acquisition Loop -- The Phase Detector ...........................................19
4.6 4:1 Input Mux ................................................................................................20
4.7 Automatic and Manual Data Rate Selection .................................................20
4.8 Bypass Mode ................................................................................................21
4.9 DVB-ASI Operation .......................................................................................21
4.10 Lock ............................................................................................................22
4.11 Output Drivers .............................................................................................22
4.12 Output Mute ................................................................................................22
5. Typical Application Circuits .....................................................................................23
6. Package & Ordering Information.............................................................................25
6.1 Package Dimensions ....................................................................................25
6.2 Packaging Data .............................................................................................26
6.3 Ordering Information .....................................................................................26
7. Revision History ......................................................................................................27
GS1535A / GS9065A Data Sheet
31497 - 3
November 2005
4 of 27
1. Pin Out
1.1 GS1535A Pin Assignment
Figure 1-1: 64-Pin LQFP
P
XTAL_OUT-
XTAL_OUT+
GND
VEE_DDO
VCC_DDO
DDO
DDO_VTT
GND
RSVD
RSVD
RSVD
RSVD
GND
RSVD
KBB
DDI_SEL0
DDI_SEL1
BYPASS
AUTOBYPASS
VCC_VCO
VEE_VCO
SS0
SS1
SS2
LD
RSVD
VCC_DIG
VEE_DIG
GND
DDI0
DDI0_VTT
GND
DDI1_VTT
GND
DDI1
DDI2_VTT
GND
DDI2
DDI3_VTT
GND
DDI3
GND
LF-
LF+
VCC_CP
VEE_CP
RSVD
RSVD
RSVD
XTAL-
XTAL+
GS1535A
(TOP VIEW)
DDI3
DDI2
DDI1
DDI0
AUTO/MAN
SD/HD
DDO_MUTE
RSVD
DDO
ASI/177
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
RSVD
RSVD
RSVD
GS1535A / GS9065A Data Sheet
31497 - 3
November 2005
5 of 27
1.2 GS9065A Pin Assignment
Figure 1-2: 64-Pin LQFP
P
XTAL_OUT-
XTAL_OUT+
GND
VEE_DDO
VCC_DDO
DDO
DDO_VTT
GND
RSVD
RSVD
RSVD
RSVD
GND
RSVD
KBB
DDI_SEL0
DDI_SEL1
BYPASS
AUTOBYPASS
VCC_VCO
VEE_VCO
SS0
SS1
SS2
LD
RSVD
VCC_DIG
VEE_DIG
GND
DDI0
DDI0_VTT
GND
DDI1_VTT
GND
DDI1
DDI2_VTT
GND
DDI2
DDI3_VTT
GND
DDI3
GND
LF-
LF+
VCC_CP
VEE_CP
RSVD
RSVD
RSVD
XTAL-
XTAL+
GS9065A
(TOP VIEW)
DDI3
DDI2
DDI1
DDI0
AUTO/MAN
SD
DDO_MUTE
RSVD
DDO
ASI/177
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
RSVD
RSVD
RSVD