ChipFind - документация

Электронный компонент: GS71024T-15

Скачать:  PDF   ZIP
GS71024T/U
64K x 24
1.5Mb Asynchronous SRAM
8, 9, 10, 12, 15 ns
3.3 V V
DD
Center V
DD
and V
SS
TQFP, FP-BGA
Commercial Temp
Industrial Temp
Rev: 1.05 11/2004
1/13
1999, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Features
Fast access time: 8, 9, 10, 12, 15 ns
CMOS low power operation: 190/170/160/130/110 mA at
minimum cycle time.
Single 3.3 V 0.3 V power supply
All inputs and outputs are TTL-compatible
Fully static operation
Industrial Temperature Option: 40 to 85C
Package
T: 100-pin TQFP package
U: 6 mm x 8 mm Fine Pitch Ball Grid Array
GT: Pb-Free 100-pin TQFP available
Description
The GS71024 is a high speed CMOS static RAM organized as
65,536 words by 24 bits. Static design eliminates the need for
external clocks or timing strobes. The GS71024 operates on a
single 3.3 V power supply, and all inputs and outputs are TTL-
compatible. The GS71024 is available in a 6 mm x 8 mm Fine
Pitch BGA package, as well as in a 100-pin TQFP package.
Fine Pitch BGA Bump Configuration
6 mm x 8 mm, 0.75 mm Bump Pitch
Top View
Block Diagram
1
2
3
4
5
6
A
DQ
A
3
A
2
A
1
A
0
DQ
B
DQ
DQ
CE2 WE
DQ
DQ
C
DQ
DQ
CE1
OE
DQ
DQ
D
V
SS
DQ
A
5
A
4
DQ
V
DD
E
V
DD
DQ
A
7
A
6
DQ
V
SS
F
DQ
DQ
A
9
A
8
DQ
DQ
G
DQ
DQ
A
11
A
10
DQ
DQ
H
DQ
A
15
A
14
A
13
A
12
DQ
Pin Descriptions
Symbol
Description
Symbol
Description
A
0
to A
15
Address input
DQ
1
to DQ
24
Data input/output
X/Y
Vector Input
V/S
Address Multiplexer Control
WE
Write enable input
OE
Output enable input
CE1, CE2
Chip enable input
--
--
V
DD
+3.3 V power supply
V
SS
Ground
Memory Array
1024 x 1536
Row
Decoder
Column
Decoder
Address
Input
Control
I/O Buffer
A0
A15
CE1
WE
OE
DQ1
DQ24
0
1
Q
A14
X/Y
V/S
CE2
GS71024T/U
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 11/2004
2/13
1999, GSI Technology
100-Pin TQFP Pinout
NC
NC
NC
NC
NC
DQ
DQ
DQ
DQ
V
SS
V
DD
DQ
DQ
V
SS
NC
V
DD
NC
DQ
DQ
V
DD
V
SS
DQ
DQ
DQ
DQ
NC
NC
NC
NC
NC
NC
A
A
A
A
A
A
NC
NC
V
SS
V
DD
NC
NC
A
A
A
A
A
NC
A
A
CE1
NC
NC
NC
WE
NC
V
DD
V
SS
OE
NC
NC
NC
A
0
A
1
A
Top View
NC
NC
DQ
DQ
V
SS
V
DD
DQ
DQ
NC
V
DD
NC
V
SS
DQ
DQ
V
DD
V
SS
DQ
DQ
DQ
NC
NC
NC
NC
DQ
DQ
NC
NC
NC
DQ
NC
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
V/S
CE
2
NC
X/Y
GS71024T/U
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 11/2004
3/13
1999, GSI Technology
X: "H" or "L"
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Truth Table
CE1
CE2
OE
WE
V/S
Mode
DQ0 to DQ23
V
DD
Current
H
X
X
X
X
Not selected
High Z
ISB1, ISB2
X
L
X
X
X
Not selected
High Z
L
H
L
H
H
Read using X/Y
Data Out
I
DD
L
H
L
H
L
Read using A15
Data Out
L
H
X
L
H
Write using X/Y
Data In
L
H
X
L
L
Write using A15
Data In
L
H
H
H
X
Output disable
High Z
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
V
DD
0.5 to +4.6
V
Input Voltage
V
IN
0.5 to V
DD
+ 0.5
(
4.6 V max.)
V
Output Voltage
V
OUT
0.5 to V
DD
+ 0.5
(
4.6 V max.)
V
Allowable TQFP power dissipation
PD
1
W
Allowable FPBGA power dissipation
PD
1
W
Storage temperature
T
STG
55 to 150
o
C
GS71024T/U
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 11/2004
4/13
1999, GSI Technology
Notes:
1. Input overshoot voltage should be less than V
DD
+ 2 V and not exceed 20 ns.
2. Input undershoot voltage should be greater than 2 V and not exceed 20 ns.
Notes:
1. Tested at T
A
= 25C, f = 1 MHz
2. These parameters are sampled and are not 100% tested
Recommended Operating Conditions
Parameter
Symbol
Minimum
Typical
Maximum
Unit
Supply Voltage for -10/12/15
V
DD
3.0
3.3
3.6
V
Supply Voltage for -8
V
DD
3.135
3.3
3.6
V
Input High Voltage
V
IH
2.0
--
V
DD
+ 0.3
V
Input Low Voltage
V
IL
0.3
--
0.8
V
Ambient Temperature,
Commercial Range
T
Ac
0
--
70
o
C
Ambient Temperature,
Industrial Range
T
Ai
40
--
85
o
C
Capacitance
Parameter
Symbol
Test Condition
Maximum
Unit
Input Capacitance
C
IN
V
IN
= 0 V
5
pF
I/O Capacitance
C
OUT
V
OUT
= 0 V
7
pF
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Minimum
Maximum
Input Leakage Current
I
IL
V
IN
= 0 to V
DD
1uA
1uA
Output Leakage Current
I
OL
Output High Z, V
OUT
= 0
to V
DD
1uA
1uA
Output High Voltage
V
OH
I
OH
= 4mA
2.4
--
Output Low Voltage
V
OL
I
OL
= +4mA
--
0.4 V
GS71024T/U
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.05 11/2004
5/13
1999, GSI Technology
AC Test Conditions
Power Supply Currents
Parameter
Symbol
Test Conditions
0 to 70C
-40 to 85C
8 ns
9 ns
10 ns
12 ns
15 ns
10 ns
12 ns
15 ns
Operating
Supply
Current
I
DD
CE
V
IL
All other inputs
V
IH
or
V
IL
Min. cycle time
I
OUT
= 0 mA
190 mA 170 mA 160 mA 130 mA 110 mA 165 mA 135 mA 115 mA
Standby
Current
I
SB1
CE
V
IH
All other inputs
V
IH
or
V
IL
Min. cycle time
45 mA
45 mA
40 mA
35 mA
30 mA
45 mA
40 mA
35 mA
Standby
Current
I
SB2
CE
V
DD
0.2 V
All other inputs
V
DD
0.2 V or
0.2 V
10 mA
15 mA
DQ
VT = 1.4 V
50
30pF
1
DQ
3.3 V
Output Load 1
Output Load 2
589
434
5pF
1
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for t
LZ
, t
HZ
, t
OLZ
and t
OHZ
.
Parameter
Conditions
Input high level
V
IH
= 2.4 V
Input low level
V
IL
= 0.4 V
Input rise time
tr = 1 V/ns
Input fall time
tf = 1 V/ns
Input reference level
1.4 V
Output reference level
1.4 V
Output load
Fig. 1& 2