HA12188AF

Pre-Amplifier and Servo IC for Quadruple-Speed CD-ROM

ADE-207-183(Z)

1st. Edition

October 1995

Description

The typical values of built-in capacitances in this IC are reduced 10% compared with those in IC
HA12188F. The values of Electrical Characteristics of this IC are same as those of IC HA12188F.

Functions

RF amplifier

Focus error amplifier

Tracking error amplifier

FOK detector

Mirror detector

Defect detector

APC amplifier

Focus, tracking, and sled servo control

Inner/outer direction detector

Features

Built-in variable resistors for adjusting tracking error EF balance, tracking gain, and focus gain

Single power supply

Supports double and quadruple speeds

Few external components

FP-56 package

HA12188AF

Rev.1, Oct. 1995, page 2 of 35

Block Diagram

RF1

RF2

APC

TR1

TR2

TZC

FZC

DS1

FOK

RFS

Bias

TM1

THS

FS4

TM3 TM4

TM7

TSA

FS2

FS1

FSA

DS2

TM5 TM6

TM2

SSA

CLK

LDS

DATA

XLT

XRST

SENS

COUT

RS2

RS1

TPS

TLS

FPS

FLS

DEFECT
or DRT

BAL

Focus
bias
adj.

FAC
DRIV.

TAC
DRIV.

SLM
DRIV.

Phase

compen.

30 29

Defect

Mirror

Input

I/F

Logic

Output

I/F

Phase

compen.

2.7

· The states of the IC's internal switches at XRST = "L" are shown at block diagram.
· The black dot symbol of transfer switch shows on state.
· The symbols " " mean connecting to V

· The symbols " " mean connecting to pin 45.

HA12188AF

Rev.1, Oct. 1995, page 3 of 35

Pin Descriptions and Equivalent Circuits

Pin No.

Symbol

Equivalent Circuit

Function

470 k

Focus error hold signal output

Tracking error hold signal output

TSI

Tracking servo input

FSI

Focus servo input

FLS

90 k

Focus-servo low-frequency filter
resistor & capacitor connection
(FLS on)

FLS

30 k

Focus-servo low-frequency filter
capacitor connection (FLS off)

SGND

Servo ground

FPS

Resistor connection for programming
focus-servo phase compensation
(FPS off)

FPS

Resistor connection for programming
focus-servo phase compensation
(FPS on)

FSA

20 k

Focus servo output

FS1

20 k

FS1 voltage output

TLS

33 k

Tracking servo low-frequency filter
capacitor connection (TLS off)

HA12188AF

Rev.1, Oct. 1995, page 9 of 35

Operation

1. Microprocessor Control

The IC's internal switches can be operated by sending control data from a microprocessor. The signal
timing is shown in figure 1, and the control commands are listed in table 1.

DATA

CLK

XLT

Item

Clock frequency

Clock pulse width

Delay time

Latch pulse width

Symbol

CLK

T1, T2

Min

0.96

Typ

Max

520

Unit

kHz

Figure 1 Timing Diagram for Microprocessor Control

Signals from the microprocessor are input at pins 23 to 27. A low input at the XRST pin resets the IC.
Normally this pin should be kept high. (See figure 2.)

CLK

DATA

XLT

XRST

SENS

COUT

DEFECT
or DRT

Input

I/F

Logic

Output

I/F

Figure 2 Microprocessor Interface

HA12188AF

Rev.1, Oct. 1995, page 10 of 35

Table 1

Microprocessor Control Commands

Focus mode

Access control mode

Pulse setting mode

DATA

D7D6D5D4

SENS

Tracking mode and FS1
DRT setting

Speed setting mode

EF balance adjustment

Tracking gain and focus
gain adjustment

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

FS4

DEFECT
OFF

FS2

FS1

FZC

DRT
0: Defect
1: Direction

TM7

THS

TZC

BAL2

BAL1

BAL0

0 ;

GF2

GF0

GT2

GT0

TM5, TM6 current

TM3, TM4 current

Focus

tracking

Mirror

FS1 current

See table 2

Focus
gain

1 ; Tracking

gain

FLS FPS

TLS TPS

RS1 RS2

0
1
1

Mode

Normal
Double

Quadruple

0
0
1

0
1
0
1

Current value

0
0
1
1

0
1
0
1

Current value

0
0
1
1

Notes: 1.

4.
5.

6.
7.

The switch name surrounded by circle means that the switch turns on when the corresponding
bit is "1". The switch name with bar surrounded by circle means that the switch turns on when
the corresponding bit is "0".
"DEFECT OFF" means that switches DS1 and DS2 don't turn on when the corresponding bit
is "1". Though the "DEFECT OFF" bit is set, the output at pin 20 is defect signal (in defect
signal output mode).
DRT (pin 20) outputs defect signal when the corresponding bit is "0", and outputs direction
signal when the corresponding bit is "1".
TM7 can turn on only when COUT is high.
The value of two current sources over switch FS1 are 18

A(source) 36

A(sink) when the

corresponding bit is "1", and are 9

A(source) 18

A(sink) when the corresponding bit is "0".

The current values through switches TM3, TM4, TM5 and TM6 can be selected in four steps.
The speed of Mirror circuit can be selected in three steps. Don't use D3 = "1", D2 = "0" mode.

HA12188AF

Rev.1, Oct. 1995, page 11 of 35

Table 2

Access Control Mode

ST3

DATA

ST1

ST2

TM5 TM4 TM3 TM2 TM1 TM6 TM5 TM4 TM3 TM2 TM1 TM6 TM5 TM4 TM3 TM2 TM1

$20

$21

$22

$23

$24

$25

$26

$27

$28

$29

$2A

$2B

$2C

$2D

$2E

$2F

TM6

A circle means that the switch is ON.

Note:

After the microprocessor sends serial data, TM1 to TM6 can be switched among the states listed
under ST1 to ST3 by input at the DC pin. First, if the microprocessor sends serial data when DC is
high, TM1 to TM6 are placed in the state listed under ST1. When DC is brought low, the states
change to the states listed under ST2. Then if DC is brought high again, the states change to the
states listed under ST3.

HA12188AF

Rev.1, Oct. 1995, page 13 of 35

2. RF and Focus Error Pre-Amplifiers

The main beam output signals from the photodiode IC are led in through resistors at pins 43 and 44. The
outputs of amplifiers RF1 and RF2 are summed by amplifier RFS to generate the EFM RF signal. (*1)

External resintances of pins 43 and 44 and amplifier RFS should be set according to the pick-up so that the
RF signal at pin 38 is about 1.5 V

(the difference between the peak level of 11T signal component and the

voltage at no signal).

Switches RS1 and RS2 operate together under microprocessor control. For example they are on for normal
or double speed, and off for quadruple speed. ON resistance of RS1 is 1.1k

typ and on resistance of RS2

is 530

typ.

Figure 3-A shows the frequency characteristic at pin 38 in the condition of figure 3.(Input resistances of
pins 43 and 44 are 10k

External resistances and capacitances should be fitted according to the pick-up. Stray capacitances of board
print patterns have influence on this frequency characteristic. Therefore external resistances and
capacitances should be set considering stray capacitances.

Amplifier FE subtracts the output of amplifier RF2 from the output of amplifier RF1 to generate the focus
error signal. The gain is 0dB. The focus error signal is output as the output of amplifier FA at pin 55, with a
gain set by variable resistor VR and the external resistance values. With the external resistors in figure 3,
the gain of amplifier FA is 8.7dB (initial value after reset).

Variable resistor VR is controlled by 3-bit data. The gain can be varied from 5dB to +7dB with respect to
the reset value.

The focus error signal is binarized by comparator FZC, with a Vth equal to V

+ 0.38V.

A reference voltage of 1/2 V

is output at pin 45. The IC's internal reference voltage is connected

internally.

The feedback resistance of amplifier FA should be set according to the pick-up so that the focus S-curve at
pin 55 is about 3V peak-to-peak.

Note: 1

The sink current of amplifier RFS is about 1mA. When load capacitance of pin 38 is big because
of wiring with CD DSP LSI etc, please use buffer amplifier. (for example emitter follower
transistor)

HA12188AF

Rev.1, Oct. 1995, page 16 of 35

3. Tracking Pre-Amplifiers

The sub-beam outputs from the photodiode IC are led in through resistors at pins 48 and 49.

External resistances of pins 48 and 49 and amplifier TE should be set according to the pick-up so that the
traverse signal at pin 52 is about 2 V

After a reset, the initial value of the feedback resistance BAL from amplifier TR1 to pin 48 is 400k

, the

same as the feedback resistance from amplifier TR2 to pin 49.

BAL has a variable resistance value that is controlled by 4-bit data. The variable range is from 32% to
+28% of the reset value. This resistance can be varied to adjust the EF balance of the tracking error.

Amplifier TE generates the tracking error signal. Its input signals are received from the preceding stage
through variable resistors VR. With the external resistor values in figure 5, after a reset, the initial value of
the gain is 8.8dB.

The variable VR resistance is controlled by 3-bit data. The gain can be varied from 5dB to +7dB with
respect to the reset value.

The tracking error signal is coupled through a capacitor to input pin 53 and binarized by comparator TZC,
with a Vth equal to V

. (*1)

Note: 1

At normal speed the output of amplifier TE contains much EFM signal components. Therefore
the output of amplifier TE had better be led in through LPF for reduction of EFM signal
components at pin 53.

TR1

TR2

TZC

BAL

62 k

75 k

3.6 p

400 k

0.022

Unit R :

C : F

Figure 5 Tracking Pre-Amplifiers

HA12188AF

Rev.1, Oct. 1995, page 18 of 35

Table 5

BAL Values

BAL

Ratio

272k

32%

288k

28%

304k

24%

320k

20%

336k

16%

352k

12%

368k

384k

400k

±0%

416k

+4%

432k

+8%

448k

+12%

464k

+16%

480k

+20%

496k

+24%

512k

+28%

4. FOK Detector

This detector is a comparator that generates the FOK signal. FOK is one of the signals that determines
when to activate the focus servo. When the voltage at pin 38 exceeds the voltage at pin 34 by
approximately 0.4V, pin 32 goes high.

FOK

30 29

Defect

Mirror

0.033

0.015

Unit C : F

Figure 8 Mirror, FOK, and Defect Detectors

HA12188AF

Rev.1, Oct. 1995, page 19 of 35

5. Defect Detector

When a scratched disc is played, the EFM RF signal has the shape shown in figure 9 (a). The defect
detector detects the drop-out area of this signal. Scratches with dimensions of about 100

m or greater are

detected.

;;;;;;;;;;;;;;;;;;;;

(a) Pin 38

(b) Pin 20

Figure 9 Defect Detector Waveforms

6. Mirror Detector

As the pick-up travels across tracks, the EFM RF signal varies as in figure 10 (a). At pin 34, the signal
varies as in figure 10 (b). The mirror detector detects the mirror areas. The external capacitor on pin 33
integrates the track-crossing frequency component.

The internal time constant of the mirror detector can be set for normal, double, or quadruple speed by
microprocessor commands, to raise the trackable range of track-crossing frequencies.

;;;;;;

;;;;;;;;;;;;;;;;;;;;;;

(a) Pin 38

(b) Pin 34

Figure 10 Mirror Detector Waveforms

HA12188AF

Rev.1, Oct. 1995, page 20 of 35

7. Bias

The 12-k

external resistor on pin 36 sets the reference value of the IC's internal bias current. Use only

this resistance value. The IC will not operate correctly with other resistance values.

Pin 35 is for a bypass capacitor to eliminate noise from the IC's internal bias circuits.

Bias

12 k

0.1

Unit R :

C : F

Figure 11 Bias

8. APC

This circuit is for the Psub laser diode. The APC circuit is switched off when pin 28 is high.

APC

LDS

1 k

Unit R :

Figure 12 APC

9. Focus Servo System

The focus error signal is led in through a gain-control resistor to pin 56. Focus bias is adjusted at pin 56.

When a defect is detected, switch DS2 propagates the focus error signal, which is integrated by an internal
resistor and external capacitor. Switch DS2 also inverts the phase of the propagated signal.

Switch FS4 is the focus servo loop switch.

Switch FLS switches low frequency filter, thereby switching the AC gain of the servo.

Switch FPS switches the peak phase-compensation frequency. This switch is linked with switch FLS and
tracking servo switches TLS and TPS. For example this switch is off at normal, double speed and is on at
quadruple speed.

The DC gain from input at pin 56 to output at pin 9 is 19dB. Figure 14 shows the frequency characteristic
when pin 4, 5 are open.

HA12188AF

Rev.1, Oct. 1995, page 21 of 35

Switch FS1 switches a current source to generate the focus search voltage. When switch FS2 is switched
on, focus is acquired by switching switch FS1 on and off.

The current through switch FS1 can be switched in two stages: 36

A sink/18

A source, and 18

sink/9

A source.

FS4

FS2

FS1

FSA

DS2

FPS

FLS

FAC
DRIV.

330 k 330 k

Phase

compen.

7 k

20 k

30 k

90 k

150 k

22 k

470 k

0.1

0.047

Focus
bias adj.

20 k

91 k

2.7

Unit R :

C : F

Figure 13 Focus Servo

Gain

Phase

Gain (dB)

100k

100

10k

Frequency (Hz)

Phase (deg)

180

108

180

Note:

Peak frequency of phase compensation is inversely proportional to external resistance value
(330k

at this figure) of pin 7, 8.(dot line : $40 mode, solid line : $42 mode)

Figure 14 Focus Servo Frequency Characteristic (pin 4, 5 are open)

HA12188AF

Rev.1, Oct. 1995, page 22 of 35

The transform function of phase compen block at figure 13 is as follows.

VOUT

VIN

8.95

1+j

(2.7

)

1+j

7.9

(

5.6

(

)

tan

-1

7.9

(

)

tan

-1

5.6

tan

-1

(2.7

)

(

)

at FPS OFF

or I

0.71V

External resistance value of pin 7 or 8

I = I

at FPS ON

I = 2.7 I

10. Tracking Servo System

The tracking error signal is led in through a gain-control resistor to pin 2.
When a defect is detected, switch DS1 propagates the tracking error signal, which is integrated by an
internal resistor and external capacitor. Switch DS1 also inverts the phase of the propagated signal.
Switch TM1 is the tracking servo loop switch.
Switch TLS switches low frequency filter, thereby switching the AC gain of the servo.
The purpose of switch THS is to raise the high-frequency gain.
Switch TPS switches the peak phase-compensation frequency. This switch is linked with switch TLS and
focus servo switches FLS and FPS. For example this switch is off at normal, double speed and is on at
quadruple speed.
Switch TM7 is turned on by taking the logical AND of COUT and microprocessor data, to improve the
performance of the pick-up. COUT is a signal generated by latching Mirror with both edges of TZC.

DS1

TM1

THS

TM3 TM4

TM7

TSA

TPS

TLS

TAC
DRIV.

Phase

compen.

22 k

100 k

167 k

100 k

33 k

470 k

0.1

18 p

330 k 330 k

Unit R :

C : F

2.7

Figure 15 Tracking Servo

HA12188AF

Rev.1, Oct. 1995, page 23 of 35

Gain (dB)

100k

100

10k

Frequency (Hz)

Phase (deg)

180

108

180

Phase

Gain

Note:

Peak frequency of phase compensation is inversely proportional to external resistance value
(330k

at this figure) of pin 13, 14. (dot line : $40 mode, solid line : $42 mode)

Figure 16 Tracking Servo Frequency Characteristic (pin 11, 12 are open)

The transform function of phase compen block at figure 15 is as follows.

VOUT

VIN

4.47

1+j

7.9

(

5.6

(

)

tan

-1

7.9

(

)

tan

-1

5.6

(

)

at TPS OFF

at TPS ON

or I

0.71V

External resistance value of pin 13 or 14

I = I

I = 2.7 I

HA12188AF

Rev.1, Oct. 1995, page 24 of 35

Figure 17 shows the phase relationships of Mirror, the tracking error, TZC, and COUT. TM7 operates to
prevent the moving direction component of the tracking error signal from reaching the actuator.

The purpose of switches TM3 and TM4 is to generate the track jump voltage. A positive voltage appears at
pin 16 when TM3 is switched on. A negative voltage appears at pin 16 when TM4 is switched on.

The current values through switches TM3 and TM4 can be selected in four steps: 8

A, 16

A, 24

A, and

A. The DC gain from input at pin 2 to output at pin 16 is 13dB. Figure 16 shows the frequency

characteristic when pin 11, 12 are open.

Tracking error

Mirror

TZC

COUT

(a) Moving inward

(b) Moving outward

Figure 17 Phase Relationships of Mirror and Other Signals

11. DRT

DRT is an output signal that indicates the inward or outward direction. In the example in figure 18, DRT is
low during motion from outer toward inner tracks, and high for motion in the reverse direction. This signal
is output from pin 20 on command from the microprocessor.

DRT

(moving outward)

(moving inward)

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;;;;;;;

;;;;;;

;;;;;;;;;;

;;;;;;

;;;;;;;

Figure 18 DRT

HA12188AF

Rev.1, Oct. 1995, page 25 of 35

12. Sled Servo

The signal output at pin 16 is passed through a low-pass filter and input at pin 17. TM2 is the loop switch
of the sled servo.

TM5 and TM6 are current switches that generate voltages for large movements of the sled. A positive
voltage appears at pin 19 when TM5 is switched on. A negative voltage appears at pin 19 when TM6 is
switched on.

The current values through switches TM5 and TM6 can be selected in four steps: 8

A, 16

A, 24

A, and

TM5 TM6

TM2

SSA

SLM
DRIV.

56 k

6.8 k

0.22

12 k

82 k

Unit R :

C : F

TM2 on resistsnce 230

typ

Figure 19 Sled Servo

13. Direct Control

The switches in the tracking control and sled servo control blocks can be switched on and off by
microprocessor commands. TM1 to TM6 can also be controlled directly by the DC pin after input of serial
data from the microprocessor.

When the microprocessor sends a command from $20 to $2F as serial data with DC high, TM1 to TM6 are
placed in the states indicated under ST1 in table 2. Next, when DC is driven low, the states change to ST2.
When DC is brought high again, the states change to ST3.

Example of using the DC terminal for 1 track jump is as follows.

For inside track jump, after sending the $2C at DC = "H", when the TZC's rising edge is detected set DC =
"L" and set DC = "H" after a setting time.

For outside track jump, after sending the $28 at DC = "H", when the TZC's falling edge is detected, set DC
= "L" and set DC = "H" after a setting time.

HA12188AF

Rev.1, Oct. 1995, page 26 of 35

Test Circuit Diagram

10 k

S22

S21

S20

S19

4 k7

51 k

6 k2

SSA

TM6

TM5

Logic

Input

I/F

Output

I/F

TM2

TM4

TM3

0.015

Defect

FOK

Mirror

0.033

S32

10 k

S34A

S34

0.1

12 k

Bias

10 k

RFS

RS1

RS2

RF1

RF2

APC

TR1

TR2

BAL

TZC

FZC

DS1

FS4

DS2

FLS

FS2

FPS

200 k

33 k

4 k7

200 k

33 k

4 k7

S16

TSA

TM7

TLS

TPS

THS

TM1

FS1

FSA

S61

V61

S60

0.1

S56

15 k

S53

62 k

S49

390 k

S48

S44

S43

10 k

Phase

compen.

Phase

compen.

5 k 6

S17

560

2 k

2SB
561 c

2.7

Unit R :

C : F

S55

39 k

S52

39 k

S38

4.7 k

0.1

HA12188AF

Rev.1, Oct. 1995, page 28 of 35

Electrical Characteristics (Ta = 25

C, V

= 5V)

Item

Symbol

Min

Typ

Max

Unit

Test Conditions

Pins

1.Current dissipation

No signal

15, 42

2.Reference voltage

2.3

2.5

2.7

I45 = ±5mA

RF amp.

3.Offset voltage

4.Max. output level H

RFH

4.2

S38,S43,S44,S61
V61 = 4.0V

5.Max. output level L

RFL

2.1

S38,S43,S44,S61
V61 = 1.0V

6.Voltage gain

VRF

10.0

12.0

14.0

S43, S44, S60
V38/V

Focus
error amp.

7.Offset voltage

8.Max. output level H

FAH

4.0

4.5

S44, S55, S61
V61 = 4.0V

9.Max. output level L

FAL

0.5

1.0

S43, S55, S61
V61 = 4.0V

10.Voltage gain 1

VFAI

6.7

8.7

10.7

S43, S60
V55/V

11.Voltage gain 2

VFA2

6.7

8.7

10.7

S44, S60
V55/V

Tracking
error amp.

12.Offset voltage

13.Max. output level H

TEH

4.0

4.5

S49, S52, S61
V61 = 4.0V

14.Max. output level L

TEL

0.5

1.0

S48, S52, S61
V61 = 4.0V

15.Voltage gain 1

VTE1

7.0

9.0

11.0

S49, S60
V52/V

16.Voltage gain 2

VTE2

7.0

9.0

11.0

S48, S60
V52/V

FOK

17.FOK Vth

FOK

0.25

0.38

0.50

S34, S61
when V32

Min (V38 V34)

18."H" output voltage

FKH

4.7

S34, S61

19."L" output voltage

FKL

0.4

S32, S34, S61

Defect

20.Max operation frequency

kHz

S43, S44, S60

21.Min operation frequency

kHz

S43, S44, S60

22."H" output voltage

DFH

4.7

23."L" output voltage

DFL

0.4

S20

Note: All offset voltages are values referring to V

(pin 45)at XRST = "L".

HA12188AF

Rev.1, Oct. 1995, page 29 of 35

Electrical Characteristics (Ta = 25

C, V

= 5V) (cont)

Item

Symbol

Min

Typ

Max

Unit

Test Conditions

Pins

Defect

24.Operation min input level

DF1

0.75

VPP

S43, S44, S60

25.operation max input level

DF2

2.5

VPP

S43, S44, S60

COUT

26.Max operation frequency

100

kHz

S34A, S53, S60 *

Mirror Qudruple
mode

27."H" output voltage

COH

4.7

28."L" output voltage

COL

0.4

S21

CLK,
DATA,
XLT, DC,
XRST

29."H" input level

4.0

23 to
27

30."L" input level

1.0

23 to
27

APC

31.APC voltage

APC

0.09

0.16

0.23

32.TZC Vth

TZC

S53, S61
Refer to V53

33.FZC Vth

FZC

0.25

0.38

0.50

S43, S61

Focus
servo
amp.

34.Offset voltage

100

35.Max output level H

FOH

4.0

4.5

S9, S56, S61
FS4 on, V61 = 1.0V

36.Max output level L

FOL

0.8

1.0

S9, S56, S61
FS4 on, V61 = 4.0V

37.Voltage gain

VFO

16.9

18.9

20.9

S56, S60
V9/V

FS4, FLS, FPS on

38.Search voltage 1

0.70

0.51

0.32

FS2 on
V9 V

39.Search voltage 2

0.32

0.51

0.70

FS2, FS1 on
V9 V

Tracking
servo
amp.

40.Offset voltage

120

41.Max output level H

TOH

4.0

4.5

S2, S16, S61
TM1 on, V61 = 1.0V

42.Max output level L

TOL

0.8

1.0

S2, S16, S61
TM1 on, V61 = 4.0V

Note:

90deg phase differnce between V

34 and V

60.

HA12188AF

Rev.1, Oct. 1995, page 30 of 35

Electrical Characteristics (Ta = 25

C, V

= 5V) (cont)

Item

Symbol

Min

Typ

Max

Unit

Test Conditions

Pins

Tracking
servo amp.

43.Voltage gain

VTO

11.4

13.4

15.4

S2, S60
TLS, TPS, TM1 on
V16/V

44.TM3 voltage

TM3

0.51

0.71

0.89

TM3 on
V16 V

45.TM4 voltage

TM4

0.89

0.71

0.51

TM4 on
V16 V

Sled servo
amp.

46.Offset voltage

47.Max output level H

SOH

4.0

4.5

S17, S19, S61
TM2 on V61 = 4.0V

48.Max output level L

SOL

0.8

1.0

S17, S19, S61
TM2 on, V61 = 1.0V

49.Voltage gain

17.3

19.3

21.3

S17, S60
TM2 on, V19/V

50.TM5 voltage

TM5

0.55

0.85

1.10

A mode

TM5 on
V19 V

51.TM6 voltage

TM6

1.10

0.85

0.55

A mode

TM6 on
V19 V

SENS

52."H" output voltage

SEH

4.7

53."L" output voltage

SEL

0.4

S22

LDS

54."H" input voltage

LDH

3.5

55."L" input voltage

LDL

0.5

Focus VR

56.VR gain 1

FVR1

5.8

4.8

3.8

S43, S60
V55 / V

60 G

VFA1

57.VR gain 2

FVR2

3.2

2.2

1.2

S43, S60
V55 / V

60 G

VFA1

58.VR gain 3

FVR3

2.8

3.8

4.8

S43, S60
V55 / V

60 G

VFA1

59.VR gain 4

FVR4

5.8

6.8

7.8

S43, S60
V55 / V

60 G

VFA1

Tracking
VR

60.VR gain 1

TVR1

5.9

4.9

3.9

S48, S60
V52 / V

60 G

VTE2

61.VR gain 2

TVR2

3.3

2.3

1.3

S48, S60
V52 / V

60 G

VTE2

62.VR gain 3

TVR3

2.9

3.9

4.9

S48, S60
V52 / V

60 G

VTE2

63.VR gain 4

TVR4

5.9

6.9

7.9

S48, S60
V52 / V

60 G

VTE2

HA12188AF

Rev.1, Oct. 1995, page 31 of 35

Electrical Characteristics (Ta = 25

C, V

= 5V) (cont)

Item

Symbol

Min

Typ

Max

Unit

Test Conditions

Pins

BAL

64.BAL gain 1

BA1

4.2

3.2

2.2

S48, S60
V52/V

60 G

VTE2

65.BAL gain 2

BA2

3.7

2.7

1.7

S48, S60
V52/V

60 G

VTE2

66.BAL gain 3

BA3

3.2

2.2

1.2

S48, S60
V52/V

60 G

VTE2

67.BAL gain 4

BA4

2.4

1.4

0.4

S48, S60
V52/V

60 G

VTE2

68.BAL gain 5

BA5

1.1

2.1

3.1

S48, S60
V52/V

60 G

VTE2

Mirror

69.Operation min input level

MI1

0.25

S34A, S53, S60
Quadraple mode

70.Operation max input
level

MI2

2.5

S34A, S53, S60
Quadraple mode

Test Method Notes

Item No.

Notes

I15 (I15 means "current at pin 15". Following expressions are same as this expression.)+ I42

V45 (V45 means "voltage at pin 45". Following expressions are same as this expression.
These symbols mean DC voltage at DC measuring and AC voltage at AC measuring.)

V38 V

4, 5

V38

20log (V38 / V

60) V

60 = 500kHz, 0.2 V

V55 V

8, 9

V55

10, 11

20log (V55 / V

60) V

60 = 4kHz, 0.5 V

V52 V

13, 14

V52

15, 16

20log (V52 / V

60) V

60 = 4kHz, 0.5 V

(V38 V34) at the point that V32 exceeds 4V when V61 is lowered from 2.5V.

18, 19

V32

The maximum frequency for VIN60 such that the pin 20 signal is still a square wave.
V

60 = 0.25 V

+ V

+ 95mV

The minimum frequency for VIN60 such that the pin 20 signal is still a square wave.
V

60 = 0.25 V

+ V

+ 95mV

22, 23

V20

HA12188AF

Rev.1, Oct. 1995, page 32 of 35

Test Method Notes (cont)

Item No.

Notes

The minimum voltage for V38 such that the pin 20 signal is still a square wave.
V

60 = 1kHz + V

+ 95mV

The maximum voltage for V38 such that the pin 20 signal is still a square wave.
V

60 = 1kHz + V

+ 95 mV

60, V

34 90deg phase difference input signal V

60 = V

34 = 1 V

The maximum frequency for V

60 (V

34) such that the pin 21 signal is still a square wave.

27, 28

V21

H input voltage of pin 23 to 27

L input voltage of pin 23 to 27

V46

(V61 V53) such that V22 exceeds 4V when V61 is upped from 2.4V. (SENS = TZC mode)

(V55 V

) such that V22 exceeds 4V when V61 is upped from 2.5V. (SENS = FZC mode)

V9 V

35, 36

20log (V9 / V

60) V

60 = 1kHz, 0.15 V

38, 39

V9 VFO V

V16 V

41, 42

V16

20log (V16 / V

60) V

60 = 1kHz, 0.3 V

44, 45

V9 VTO V

V19 V

47, 48

V19

20log (V19 / V

60) V

60 = 4kHz, 0.15 V

50, 51

V19 VSO V

52, 53

V22

Input voltage of pin 28 such that APC is off.

Input voltage of pin 28 such that APC is on.

GF2 = 0,

1 = 1, GF0 = 0 20log (V55 / V

60) G

VFA1

60 = 4kHz, 0.5 V

GF2 = 0,

1 = 1, GF0 = 1 20log (V55 / V

60) G

VFA1

60 = 4kHz, 0.5 V

GF2 = 1,

1 = 1, GF0 = 0 20log (V55 / V

60) G

VFA1

60 = 4kHz, 0.5 V

GF2 = 1,

1 = 0, GF0 = 1 20log (V55 / V

60) G

VFA1

60 = 4kHz, 0.5 V

GT2 = 0,

1 = 1, GT0 = 0 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5 V

GT2 = 0,

1 = 1, GT0 = 1 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5 V

GT2 = 1,

1 = 1, GT0 = 0 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5 V

GT2 = 1,

1 = 0, GT0 = 1 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5 V

HA12188AF

Rev.1, Oct. 1995, page 33 of 35

Test Method Notes (cont)

Item No.

Notes

BAL

3 = 1, BAL2 = 0, BAL1 = 0, BAL0 = 0 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5V

BAL

3 = 1, BAL2 = 0, BAL1 = 0, BAL0 = 1 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5V

BAL

3 = 1, BAL2 = 0, BAL1 = 1, BAL0 = 0 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5V

BAL

3 = 1, BAL2 = 1, BAL1 = 0, BAL0 = 0 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5V

BAL

3 = 0, BAL2 = 1, BAL1 = 1, BAL0 = 1 20log (V52 / V

60) G

VTE2

60 = 4kHz, 0.5V

The minimum input voltage for VIN34 such that the pin 21 signal is still a square wave.
V

60 = 1MHz, 1 V

34 = 100kHz

The maximum input voltage for VIN34 such that the pin 21 signal is still a square wave.
V

60 = 1MHz, 1 V

34 = 100kHz

HA12188AF

Rev.1, Oct. 1995, page 35 of 35

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Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HA12188AF

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HA12188AF