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Электронный компонент: HA16138PS

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HA16138PS
AC/DC Switching Converter Controller IC
With High-Voltage Power MOS FET
ADE-204-032 (Z)
Preliminary
1st Edition
MAY 2000
Description
The HA16138PS is an IC with a high-voltage power MOS FET and current-mode type PWM controller
mounted in a DILP-8 (DP-8) standard package, suitable for low-power power supplies in the
10 W class and below.
The HA16138PS includes an energy-saving mode for holding down power consumption when on standby
(no load). When the energy-saving mode is entered, the operating frequency is reduced to 1/4 the normal
frequency, reducing power consumption. A starter circuit is also provided on-chip, eliminating the need for
the external start-up resistance needed with previous controller ICs. The starter circuit in this IC is turned
off automatically after the IC starts up, enabling the start-up resistance power consumption to be decreased.
The HA16138PS includes a soft start circuit, OVP circuit, and remote on/off circuit, making it possible to
configure a simple protection circuit with fewer external parts than previously. Also provided are a current
sense resistance and a leading edge blanking circuit that masks spike noise on current sense input, making
noise reduction in a power supply set comparatively easy.
The HA16138PS is equipped with an error amp circuit inverting input (FB) pin and output (COMP) pin,
enabling special-purpose design for both flyback system secondary-side output voltage detection and
primary-side back-up transformer output voltage detection types.
Features
Built-in high-voltage power MOS FET
Energy-saving mode (power saving through reduction of operating frequency to 1/4 normal frequency
when on standby)
Built-in starter circuit, reducing power loss of start-up resistance when on standby (external start-up
resistance not necessary)
Built-in soft start circuit, eliminating need for external connection
Remote on/off function, enabling power saving by halting PWM output without turning off power
supply
Built-in current sense resistance and leading edge blanking circuit, for sense-resistance-less and noise-
cancellation-filter-less implementation
Built-in over voltage protection circuit
Built-in over temperature protection circuit
HA16138PS
2
Pin Arrangement
(Top view)
DILP-8
(DP-8)
1
DRAIN
2
DRAIN
3
VDD
4
FB
SOURCE
SGND
CT
COMP
8
7
6
5
Pin Functions
Pin No.
Pin Name
Pin Function
1
DRAIN
On-chip power MOS FET drain pin / starter circuit input pin
2
DRAIN
On-chip power MOS FET drain pin / starter circuit input pin
3
VDD
Power supply voltage input pin
4
FB
Error amplifier inverting input pin / OVP latch circuit input pin
5
COMP
Error amplifier output pin
6
CT
Timing capacitance connection pin / on/off circuit input pin
7
SGND
Primary-side common connection pin
8
SOURCE
On-chip power MOS FET source pin
HA16138PS
3
Block Diagram
-
+
-
+
-
+
VDD
ON/OFF
Comp.
VDD
Vref
Vref
Soft Start
UVL
E-AMP
OVP Latch
Oscillator
1/4 Divider
TSD
1/3
Attenuator
Vref
Generator
UVL
Starter
DRAIN
VDD
COMP
SOURCE
Driver
UVL
CK
FF
Frequency Down
Comp.
CS
Comp.
CT
FB
+
-
+
-
D Q
R
S
Q
+
-
Delay
Leading Edge
Blanking
Rcs
HA16138PS
4
Absolute Maximum Ratings (Ta = 25
C)
Item
Symbol
Rating
Unit
Power MOS FET block
Drain-source voltage
V
DS
-
0.3 to 700
V
Maximum drain current
I
DS
0.5
A
Controller block
Power supply voltage
V
DD
0 to 15
V
CT pin voltage
V
CT
0 to V
DD
V
FB pin voltage
V
FB
0 to V
DD
V
COMP pin voltage
V
COMP
0 to 5
V
Overall
Operating temperature
Topr
-
20 to +85
C
Junction temperature
Tjmax
+150
C
Storage temperature
Tstg
-
55 to +150
C
HA16138PS
5
Electrical Characteristics (Tj = 25
C, V
DD
= 12 V, fosc1 = 100 kHz)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Power
Drain-source voltage
BV
DSS
700
V
MOS FET
Drain-source on resistance
R
DS(on)
12
20
I
D
= 0.4 A
Starter
Start-up start drain voltage
V
DRN
55
75
95
V
circuit
Start-up charge current
I
CHG
125
250
500
A
UVL circuit
Operation start power supply
voltage
V
TH
10
11
12
V
Operation stop power supply
voltage
V
TL
7
8
9
V
Operating power supply current
I
DD
2.5
4.0
mA
Oscillation
Normal mode operating frequency
fosc1
88
100
112
kHz
C
T
= 220 pF
circuit
F-down mode operating frequency
fosc2
22
25
28
kHz
C
T
= 220 pF, V
COMP
= 0 V
Maximum on duty
Dumax
70
%
Error
Open-loop voltage gain
A
V
50
65
dB
Rcomp = 220 k
amplifier
Unity gain bandwidth
BW
550
kHz
Rcomp = 220 k
Output high voltage 1
V
COMPH1
4.5
5.0
V
Iosource = 0
A
Output high voltage 2
V
COMPH2
4.3
4.8
V
Iosource = 100
A
Output low voltage
V
COMPL
0.50
0.75
V
Iosink = 0
A
Non-inverting input voltage
V
(+)EA
3.4
3.8
4.2
V
Power
Output rise time
t
r
100
ns
C
L
= 1000 pF
MOS FET
Output fall time
t
f
80
ns
C
L
= 1000 pF
gate drive
Output high voltage
V
OH
10
V
Iosource = 25 mA
circuit
Output low voltage
V
OL
0.5
V
Iosink = 25 mA
Current
Current sense voltage gain
A
VCS
3.0
V/V
sense
Current sense response time
tpdcs
200
ns
Vcomp = 5.0 V
circuit
Leading edge blanking time
t
BL
300
ns
OVP latch
OVP latch set voltage
Vovp
4.2
5.0
5.8
V
Vovp: FB pin voltage
circuit
OVP latch reset voltage
Vovpr
4.0
V
Vovpr: VDD pin voltage
OVP latch current dissipation
Iovp
1.1
1.7
mA
V
FB
= 6.0 V
Remote
on/off circuit
Off mode start voltage
Voff
3.6
3.8
4.0
V
Voff: CT pin voltage
Soft start
circuit
Soft start time
tst
(1.0)
2.0
(3.0)
ms
Time from start-up to
max. duty
f-down
comparator
F-down mode start voltage
Vfdcp
0.7
0.85
1.0
V
Over
temperature
protection
circuit
Over temperature protection start
temperature
TSD
150
C
TSD: Power MOS FET
junction temperature
HA16138PS
6
Functional Description
Note:
Unless specified otherwise, characteristic values in the text and figures are typical values or design
values.
Starter Circuit
When power is turned on, the starter circuit operates during standby mode, and a constant current is
supplied from the drain pins to the VDD pin. This constant current supplies the external capacitance
charge current for charging up the VDD pin and the standby current consumed by the IC itself while on
standby.
Therefore, the start-up bleeder resistance required by previous products with no on-chip starter circuit is no
longer necessary. The starter circuit detects both the drain voltage and the VDD pin voltage, and controls
VDD so that the IC does not start up if the drain voltage is less than 75 V.
DRAIN
Istart
VDD
CT
75V
8V
Vb+
COMP
11V
DC
OUTPUT
0
0
0
0
0
0
0
Figure 1 Start-Up Timing
UVL Circuit
The UVL circuit is a function that monitors the VDD voltage, and stops IC operation if VDD is low. The
VDD detection voltage has a hysteresis characteristic; the operating start VDD voltage is 11 V, and the
operation stop voltage, 8 V.
In standby mode at the operation stop voltage or below, the UVL circuit keeps the power MOS FET turned
off, and performs control of soft start circuit resetting, internal reference voltage circuit stoppage, and so
forth.
HA16138PS
7
Error Amplifier
The error amplifier comprises a constant-current source type Pch top differential amplifier. As the
inverting input (FB) pin and output (COMP) pin are provided as external pins, use for both a simple
flyback power supply back-up voltage feedback type and a high-precision secondary voltage detection type
is possible.
Current Sense Circuit
This is a 200 ns high-speed comparator circuit suitable for current mode control. The current sense
controller reference voltage depends on the COMP pin voltage, being always 1/3 of the COMP pin voltage.
-
+
-
+
FF
R
2R
Current sense
comparator
Error amplifier
Current sense
resistance
1/3 attenuator
Power
MOS FET
Leading edge
blanking
Driver
Osc.
300 ns
Delay circuit
Figure 2 Current Sense Peripheral Circuitry
Leading Edge Blanking Circuit
The on-chip leading edge blanking circuit masks the current sense comparator input signal for a period of
300 ns after the power MOS FET gate voltage goes high. This reduces the erroneous operation due to
spike-shaped noise caused by discharge of various capacitance components when the power MOS FET is
turned on.
HA16138PS
8
Oscillation Circuit
The oscillator generates a triangular voltage waveform through the discharge of the timing capacitance CT.
With a 220 pF CT connected, the oscillator operates at 100 kHz.
The triangular voltage waveform has a discharge time ratio of 3:1, with the charge side set to PWM on-
pulses, and the discharge side to dead-band pulses. The maximum PWM on duty can be controlled up to
70%.
CT
DB pulse
(IC internal waveform)
1/3
COMP
(IC internal waveform)
CS
(IC internal waveform)
Power MOS FET
Gate voltage
(IC internal waveform)
Power MOS FET
Drain voltage
Figure 3 Oscillation Circuit Peripheral Waveform Timing
OVP Latch Circuit
When the FB pin voltage reaches 5 V or above, the OVP latch circuit operates and forcibly stops PWM
output and the reference voltage generation circuit. While OVP latching is stopped, the starter circuit is
also stopped. Latch resetting can be performed by driving power supply voltage VDD to 4 V or below.
DRAIN
CT
FB
Vref
(IC internal
waveform)
0
0
0
5V
5V
0
Figure 4 OVP Latch Operation Timing
HA16138PS
9
Remote On/Off Circuit
When the CT pin voltage is pulled up to 3.8 V or above, the remote on/off circuit operates and PWM
output can be stopped without turning off the power supply. When stoppage is executed by means of the
on/off circuit, PWM output and the starter circuit are stopped, and the soft start circuit is reset, but the
reference voltage generation circuit does not stop.
DRAIN
CT
0
3.8V
Vref
(IC internal
waveform)
5V
Figure 5 Remote On/Off Operation Timing
Soft Start Circuit
This circuit implements a soft start function with a 2 ms time constant without the use of external parts.
During a soft start, the PWM output pulse width gradually increases. The soft start time is defined as the
time from the point at which the UVL circuit start voltage is exceeded to the point at which PWM output
reaches its maximum duty.
HA16138PS
10
f-down Comparator
An "energy-saving mode" is provided to hold down power consumption during standby, with the operating
frequency in the unloaded state reduced to 1/4 of its steady operation value.
The f-down comparator detects the COMP pin voltage, and if it falls to 0.85 V or below, switches to
energy-saving mode. As COMP pin voltage detection is performed pulse-by-pulse, a skip mode comes into
effect in the vicinity of the threshold voltage according to the timing.
V
CT
V
COMP
V
DRAIN
Normal
mode
Normal
mode
Energy-
saving
mode
Energy-
saving
mode
Figure 6 Energy-Saving Mode Switching Waveform Timing
Over Temperature Protection Circuit
If the power MOS FET junction temperature reaches +150
C, the over temperature protection circuit
operates, shutting down the IC. The over temperature protection circuit is coupled to the OVP latch circuit,
so that the latch is reset if the power supply voltage is driven to 4 V or below while the junction
temperature is lower than the overheating protection start temperature.
HA16138PS
11
Main Characteristics
Operating Frequency vs. Timing Capacitance
C
T
(pF)
100
1000
300
100
30
10
200
fosc (kHz)
Power Supply Voltage vs. Drain Voltage
12
2
4
8
6
10
0
VDD (V)
300 400 500
1000
Start-up Current (Charge Current + Standby Current)
vs. Drain Voltage
Vdrain (V)
0
10
20
30
40
50
60
70
500
50
100
150
200
250
300
350
400
450
0
Idrain (
A)
80
0
10
20
30
40
50
60
70
80
Vdrain (V)
f-down mode operating frequency
normal mode operating frequency
HA16138PS
12
Error Amplifier Output High Voltage vs. Output Source Current
6.0
1.0
2.0
4.0
3.0
5.0
0
V
OH
(V)
Error Amplifier Output Low Voltage vs. Output Sink Current
2.5
0.5
1.0
1.5
2.0
0
V
OL
(V)
Iosource (
A)
0
100
200
300
400
500
600
700
800
Iosink (
A)
0
1000
400
800
200
600
HA16138PS
13
Operating Frequency (Normal Mode) vs. Ambient Temperature
110
92
94
96
98
100
102
104
106
108
90
fosc (kHz)
Operating Start/Stop Power Supply Voltage vs. Ambient Temperature
13
7
8
9
10
11
12
6
V
TH
, V
TL
(V)
Ta (
C)
Ta (
C)
-
25
100
25
75
0
50
-
25
100
25
75
0
50
V
TH
V
TL
HA16138PS
14
Thermal Resistance
j-a and Maximum Power Dissipation vs.
Printed Circuit Board Copper Heat Sink Perimeter Length
120
40
60
80
100
20
2.5
0.5
1.0
1.5
2.0
0
j-a (
C/W)
Maximum power dissipation (W)
Length of copper, L (mm)
0
50
20
40
10
30
j-a
Pt(max) for Ta = +85
C
L
2.0 oz copper heat sink
L
Pin holes
Wiring pattern
Glass-epoxy
printed circuit board
Figure 7 Sample Printed Circuit Board Copper Heat Sink Pattern
HA16138PS
15
Application Circuit Examples 1
The application circuit example shown here detects the secondary-side output voltage of a flyback power
supply. Secondary-side output voltage detection and feedback are performed by a shunt regulator and
photocoupler.
When the OVP latch function is used for secondary-side output voltage overvoltage protection, the FB pin
should be pulled up to VDD by the shunt regulator and photocoupler.
+
AC
INPUT
Line Filter
0.1
100
400V
560
25V
15
VR
260V
SBD
HRW26F
2200p
51k
P
S
HA16138PS
+
180
25V
K
A
B
+
R3
330
OVP detection circuit (7.4V)
OVP feedback circuit
R4
1.8k
C4
0.022
REF
HA17431VP
R6
4.7k
R7
2.4k
R2
15k
R1
120k
R5
3.3k
K
A
R8
330
R9
1.8k
C5
3.3
REF
HA17431VP
R11
2.4k
DC
OUTPUT
5V/2A
R12
2.4k
Photo
coupler
R10
3.3k
-
+
C2
2200p
C3
220p
C1
47
20V
VR
15V
DRAIN
DRAIN
VDD
FB
SOURCE
SGND
CT
COMP
1
2
3
4
8
7
6
5
+
: Primary GND
*
VOUT(reg) = Vref(shunt)
R11 + R12
R12
: Secondary GND
Transformer
P: 90T / 1.43mH
S: 6T / 8.1
H
B: 14T / 30.8
H
= 2.5V
= 5.0V
2.4k
+ 2.4k
2.4k
VOUT(ovp) = Vref(shunt)
R6 + R7
R7
= 2.5V
= 7.4V
4.7k
+ 2.4k
2.4k
Units R:
C: F
The secondary-side output voltage is stabilized at a
value determined by the bleeder resistance of the
secondary-side shunt regulator.
When the OVP latch function is used, the secondary-side
voltage is detected by the shunt regulator, and feedback
to the FB pin is performed by the photocoupler. The OVP
detection level is determined by the following formula.
HA16138PS
16
Application Circuit Examples 2
The application circuit example shown here detects the primary-side back-up output voltage of a flyback
power supply. As the back-up output voltage, VDD is resistance-divided and feedback is performed to the
FB pin. The back-up output voltage and secondary-side output voltage are proportional to the ratio of
transformer windings. Using this characteristic enables the system to be configured with simple circuitry
as shown in the figure below.
The VDD-to-FB feedback resistance can also be used as the back-up output voltage OVP detection
resistance.
+
AC
INPUT
Line Filter
0.1
100
400V
560
25V
15
VR
260V
SBD
HRW26F
2200p
51k
P
S
HA16138PS
+
180
25V
B
+
R4
15k
R2
120k
R1
240k
DC
OUTPUT
5V/1A
-
+
C3
2200p
C2 0.1
C4
220p
C1
47
20V
VR
15V
DRAIN
DRAIN
VDD
FB
SOURCE
SGND
CT
COMP
1
2
3
4
8
7
6
5
R3 1M
+
: Primary GND
VDD(reg) = V
(+)EA
R1 + R2
R2
: Secondary GND
Transformer
P: 90T / 1.43mH
S: 6T / 8.1
H
B: 14T / 30.8
H
= 3.8V
= 11.4V
240k
+ 120k
120k
240k
+ 120k
120k
VDD(ovp) = Vovp
R1 + R2
R2
= 5.0V
= 15V
Units R:
C: F
* If feedback resistance R1 = 240 k
and R2 = 120 k
,
feedback is performed so that the FB pin voltage is
non-inverting input voltage V
(+)EA
, and the VDD voltage
is stabilized.
When the FB pin voltage reaches OVP latch set
voltage Vovp, the OVP latch circuit operates, shutting
down the IC. The VDD voltage in this case is given
by the following formula.
HA16138PS
17
Application Circuit Examples 3
As this IC is provided with a remote on/off function, it is possible to implement power management
without turning off the power supply. Using a remote on/off control circuit as shown in the figure below,
the CT pin voltage is pulled up to the off mode start voltage or above, and the IC is stopped. In the off
mode, control of PWM output stoppage, soft start resistance resetting, and starter circuit stoppage is
performed without stopping the internal reference voltage generation circuit. With this function, also, latch
operation is not performed, and an auto-restart is executed as soon as the CT pin voltage falls below the off
mode start voltage. It is recommended that the remote on/off control signal be controlled by a
microcomputer or other logic signal.
Remote ON/OFF control circuit
Units R:
C: F
R1
10k
2SA1029
2SC458
HA16138PS
DRAIN
DRAIN
VDD
FB
SOURCE
SGND
CT
COMP
1
2
3
4
8
7
6
5
CT
220p
R3
130k
R4
10k
ON/OFF
H: OFF
L: ON
R2
43k
HA16138PS
18
Laser Marking Specifications
HA16138
PS
Product code
Lot indication and
Management code
1 2 3
Lot Indication and Management Code Contents
: The last digit of the production year.
: Production month code
1
: Management code
2
3
Production month
1
2
3
4
5
6
7
8
9
10
11
12
Month code
A
B
C
D
E
F
G
H
J
K
L
M
HA16138PS
19
Package Dimensions
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-8
Conforms
Conforms
0.54 g
Unit: mm
1
4
5
8
9.6
10.6 Max
0.89
1.3
6.3
7.4 Max
2.54 Min
5.06 Max
2.54
0.25
0.48
0.10
7.62
0.25
+ 0.10
0.05
0
15
0.1 Min
1.27 Max
HA16138PS
20
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party's rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi's sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor
products.
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Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
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