HB288032MM1
MultiMediaCard
TM
32 MByte
ADE-203-1169A (Z)
Rev. 1.0
Jul. 19, 2000
Description
The Hitachi MultiMediaCard
TM
HB288032MM1 is a highly integrated flash memory with serial and
random access capability. It is accessible via a dedicated serial interface optimized for fast and reliable
data transmission. This interface allows several cards to be stacked by through connecting their peripheral
contacts. The HB288032MM1 is fully compatible to a new consumer standard, called the MultiMediaCard
system standard defined in the MultiMediaCard system specification [1]. The MultiMediaCard system is a
new mass-storage system based on innovations in semiconductor technology. It has been developed to
provide an inexpensive, mechanically robust storage medium in card form for multimedia consumer
applications. MultiMediaCard allows the design of inexpensive players and drives without moving parts.
A low power consumption and a wide supply voltage range favors mobile, battery-powered applications
such as audio players, organizers, palmtops, electronic books, encyclopedia and dictionaries. Using very
effective data compression schemes such as MPEG, the MultiMediaCard will deliver enough capacity for
all kinds of multimedia data: software/programs, text, music, speech, images, video etc.
Note:
MultiMediaCard
TM
is a trademark of Siemens AG.
Features
32 MByte memory capacity
On card error correction
HB288032MM1
2
MultiMediaCard system standard compatibility
System specification version 2.11 compliant
SPI interface supported
Block and partial block read supported (Command classes 0 and 2)
Stream read supported (Command class 1)
Block write and erase supported (Command classes 4 and 5)
Group write protection (Command classes 6)
Stream write supported (Command classes 3)
Password data access protection
Small erase block size of 512 bytes, tagged erase supported
Read block size programmable between 1 and 2048 bytes
V
CC
= 2.7 V to 3.6 V operation voltage range (V
CC
= 2.0 V to 3.6 V for the interface)
No external programming voltage required
Damage free powered card insertion and removal
4kV ESD protection
High speed serial interface with random access
Read speed: sustained: 13.7 Mbits/s (multi-block read)
burst (one block): 20 Mbit/s
Write speed: sustained: 2.8 Mbit/s (multi-block write to pre-erased sectors)
burst (one block): 20 Mbit/s
Up to 10 stacked card (at 20 MHz, V
CC
= 2.7 to 3.6V)
Access time: 300
s (max) (at 20 MHz, V
CC
= 2.7 to 3.6V, random byte access (Typical case))
Low power dissipation
High speed: 95 mW (max) (at 20 MHz, V
CC
= 2.7 V)
HB288032MM1
3
Block Diagram
1
2
3
4
V
PP
Generator
5
6
7
Internal clock
Interface
CID[127:0]
OCR[31:0]
Flash control
Core control
CSD[127:0]
RCA[15:0]
CMD
P
o
w
er on reset unit
Register
set
DA
T
V
CC
CS CMD/DI
DAT/DO
CLK/SCLK
Interface driver
Memory core
All units in the HB288032MM1 are clocked by an internal clock generator. The Interface driver unit
synchronizes the DAT and CMD signals from external CLK to the internal used clock signal. The card is
controlled by the three line MultiMediaCard interface containing the signals: CMD, CLK, DAT (refer to
Chapter "Interfaces"). For the identification of the HB288032MM1 in a stack of MultiMediaCards a card
identification register (CID) and a relative card address register (RCA) is foreseen. An additional register
contains different types of operation parameters. This register is called card specific data register (CSD).
The communication using the MultiMediaCard lines to access either the memory field or the registers is
defined by the MultiMediaCard standard (refer to Chapter "Communication"). The card has its own power
on detection unit. No additional master reset signal is required to setup the card after power on. It is
protected against short circuit during insertion and removal while the MultiMediaCard system is powered
up (refer to Chapter "Power Supply"). No external programming voltage supply is required. The
programming voltage is generated on card. HB288032MM1 supports a second interface operation mode
the SPI interface mode. The SPI mode is activated if the CS signal is asserted (negative) during the
reception of the reset command (CMD0) (refer to Chapter "SPI Communication").
HB288032MM1
4
Interface
The HB288032MM1 interface can operate in two different modes:
MultiMediaCard mode
SPI mode
Both modes are using the same pins. The default mode is the MultiMediaCard mode. The SPI mode is
selected by activating (= 0) the CS signal (Pin1) and sending the CMD0.
MultiMediaCard Mode
In the HB288032MM1, all data is transferred over a minimal number of lines:
CLK: with each cycle of this signal an one bit transfer on the command and data lines is done. The
frequency may vary between zero and the maximum clock frequency. The MultiMediaCard bus master
is free to generate these cycles without restrictions in the range of 0 to 20 MHz.
CMD: is a bidirectional command channel used for card initialization and data transfer commands.
The CMD signal has two operation modes: open drain for initialization mode and push pull for fast
command transfer. Commands are sent from the MultiMediaCard bus master to the HB288032MM1
and responses vice versa.
DAT: is a bidirectional data channel with a width of one line. The DAT signal of the HB288032MM1
operates in push pull mode.
Interf
ace dr
iv
er
MultiMediaCard Host
ROD
RDAT
RCMD
1 2 3 4 5 6 7
HB288032MM1
CMD
CLK
DAT
MultiMediaCard Mode Interface
All MultiMediaCards are connected directly to the lines of the MultiMediaCard bus. The following table
defines the card contacts.
HB288032MM1
5
MultiMediaCard Mode Pad Definition
Pin No.
Name
Type*
1
Description
1
RSV
NC
No connection
2
CMD
I/O/PP/OD
Command/Response
3
V
SS1
S
Ground
4
V
CC
S
Power supply
5
CLK
I
Clock
6
V
SS2
S
Ground
7
DAT
I/O/PP
Data
Note:
1. S: power supply; I: input; O: output; PP: push-pull; OD: open-drain; NC: No connection or V
IH
MultiMediaCard interface controller
1 2 3 4 5 6 7
Memory core interface
OD/PP
enable
enable
Interface driver
DAT
CMD
V
SS1
V
CC
CLK
V
SS2
MultiMediaCard Mode I/O-drivers
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