Preface
The H8/3032 Series is a series of high-performance single-chip microcontrollers that integrate
system supporting functions together with an H8/300H CPU core.
The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a
concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address
space.*
The on-chip system supporting functions include ROM, RAM, a 16-bit integrated timer unit
(ITU), a programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial
communication interface (SCI), an A/D converter, I/O ports, and other facilities.
The three operating modes offer a choice of expanded mode and single-chip mode, enabling the
H8/3032 Series to adapt quickly and flexibly to a variety of conditions.
This manual describes the H8/3032 Series hardware. For details of the instruction set, refer to the
H8/300H Programming Manual.
Note: * The H8/3032 Series has a maximum address space of 1 Mbyte.
Contents
Section 1
Overview
.....................................................................................................
1
1.1
Overview ........................................................................................................................
1
1.2
Block Diagram................................................................................................................
5
1.3
Pin Description ...............................................................................................................
6
1.3.1
Pin Arrangement .............................................................................................
6
1.3.2
Pin Functions ..................................................................................................
7
1.4
Pin Functions .................................................................................................................. 10
Section 2
CPU
............................................................................................................... 15
2.1
Overview ........................................................................................................................ 15
2.1.1
Features........................................................................................................... 15
2.1.2
Differences from H8/300 CPU ....................................................................... 16
2.2
CPU Operating Modes.................................................................................................... 17
2.3
Address Space................................................................................................................. 18
2.4
Register Configuration.................................................................................................... 19
2.4.1
Overview......................................................................................................... 19
2.4.2
General Registers............................................................................................ 20
2.4.3
Control Registers ............................................................................................ 21
2.4.4
Initial CPU Register Values ............................................................................ 22
2.5
Data Formats................................................................................................................... 23
2.5.1
General Register Data Formats....................................................................... 23
2.5.2
Memory Data Formats .................................................................................... 24
2.6
Instruction Set................................................................................................................. 26
2.6.1
Instruction Set Overview ................................................................................ 26
2.6.2
Instructions and Addressing Modes................................................................ 27
2.6.3
Tables of Instructions Classified by Function ................................................ 28
2.6.4
Basic Instruction Formats ............................................................................... 38
2.6.5
Notes on Use of Bit Manipulation Instructions .............................................. 39
2.7
Addressing Modes and Effective Address Calculation .................................................. 39
2.7.1
Addressing Modes .......................................................................................... 39
2.7.2
Effective Address Calculation ........................................................................ 42
2.8
Processing States ............................................................................................................ 46
2.8.1
Overview......................................................................................................... 46
2.8.2
Program Execution State ................................................................................ 47
2.8.3
Exception-Handling State ............................................................................... 47
2.8.4
Exception-Handling Sequences ...................................................................... 49
2.8.5
Reset State ...................................................................................................... 50
2.8.6
Power-Down State .......................................................................................... 50
PDF 
ZIP
