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Электронный компонент: HD74ACT373

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HD74AC373/HD74ACT373
Octal Transparent Latch with 3-State Output
Description Diagram
The HD74AC373/HD74ACT373 consists of eight latches with 3-state outputs from bus organized system
applications. The flip-flops appear transparent to the data when Latch Enable (LE) is High. When LE is
Low, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (
OE) is
Low. When
OE is High, the bus output is in the high impedance state.
Features
Eight Latches in a Single Package
3-State Outputs for Bus Interfacing
Outputs Source/Sink 24 mA
HD74AC373 has TTL-Compatible Inputs
HD74AC373/HD74ACT373
2
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 V
CC
O
7
D
7
D
6
O
6
O
5
OE
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
Gnd
D
5
D
4
O
4
LE
(Top view)
Logic Symbol
LE
OE
D
0
D
2
D
4
D
6
D
3
D
5
D
7
D
1
O
0
O
2
O
4
O
6
O
3
O
5
O
7
O
1
Pin Names
D
0
D
7
Data Inputs
LE
Latch Enable Input
OE
Output Enable Input
O
0
O
7
3-State Latch Outputs
HD74AC373/HD74ACT373
3
Truth Table
Inputs
Outputs
OE
LE
D
n
O
n
H
X
X
Z
L
H
L
L
L
H
H
H
L
L
X
O
0
H :
High Voltage Level
L
:
Low Voltage Level
Z
:
High Impedance
X :
Immaterial
O
0
:
Previous O
0
before Low-to-High Transition of Clock
Functional Description
The HD74AC373/HD74ACT373 contains eight D-type latches with 3-state standard outputs. When the
Latch Enable (LE) input is High, data on the Dn inputs enters the latches. In this condition the latches are
transparent, i.e., a latch output will change state each time its D input changes. When LE is Low, the
latches store the information that was present on the D inputs setup time proceding the High-to-Low
transition of LE. The 3-state standard outputs are controlled by the Output Enable (
OE) input. When OE is
Low, the standard outputs are in the 2-state mode. When
OE is High, the standard outputs are in the high
impedance mode but this does not interfere with entering new data into the latches.
Logic Diagram
O
7
G
O
D
D
7
O
6
G
O
D
D
6
O
5
G
O
D
D
5
O
4
G
O
D
D
4
O
3
G
O
D
D
3
O
2
G
O
D
D
2
O
1
G
O
D
D
1
O
0
G
O
D
D
0
LE
OE
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
HD74AC373/HD74ACT373
4
DC Characteristics (unless otherwise specified)
Item
Symbol
Max
Unit
Condition
Maximum quiescent supply current
I
CC
80
A
V
IN
= V
CC
or ground, V
CC
= 5.5 V,
Ta = Worst case
Maximum quiescent supply current
I
CC
8.0
A
V
IN
= V
CC
or ground, V
CC
= 5.5 V,
Ta = 25
C
Maximum I
CC
/input (HD74ACT373)
I
CCT
1.5
mA
V
IN
= V
CC
2.1 V, V
CC
= 5.5 V,
Ta = Worst case
AC Characteristics: HD74AC373
Ta = +25
C
C
L
= 50 pF
Ta = 40
C to +85
C
C
L
= 50 pF
Item
Symbol
V
CC
(V)*
1
Min
Typ
Max
Min
Max
Unit
Propagation delay
t
PLH
3.3
1.0
10.0
13.5
1.0
15.0
ns
D
n
to O
n
5.0
1.0
7.0
9.5
1.0
10.5
Propagation delay
t
PHL
3.3
1.0
9.5
13.0
1.0
14.5
ns
D
n
to O
n
5.0
1.0
7.0
9.5
1.0
10.5
Propagation delay
t
PLH
3.3
1.0
10.0
13.5
1.0
15.0
ns
LE to O
n
5.0
1.0
7.5
9.5
1.0
10.5
Propagation delay
t
PHL
3.3
1.0
9.5
12.5
1.0
14.0
ns
LE to O
n
5.0
1.0
7.0
9.5
1.0
10.5
Output enable time
t
PZH
3.3
1.0
9.0
11.5
1.0
13.5
ns
5.0
1.0
7.0
8.5
1.0
9.5
Output enable time
t
PZL
3.3
1.0
8.5
11.5
1.0
13.0
ns
5.0
1.0
6.5
8.5
1.0
9.5
Output disable time
t
PHZ
3.3
1.0
10.0
12.5
1.0
14.5
ns
5.0
1.0
8.0
11.0
1.0
12.5
Output disable time
t
PLZ
3.3
1.0
8.0
11.5
1.0
12.5
ns
5.0
1.0
6.5
8.5
1.0
10.0
Note:
1. Voltage Range 3.3 is 3.3 V
0.3 V
Voltage Range 5.0 is 5.0 V
0.5 V
HD74AC373/HD74ACT373
5
AC Characteristics: HD74AC373
Ta = +25
C
C
L
= 50 pF
Ta = 40
C to +85
C
C
L
= 50 pF
Item
Symbol
V
CC
(V)*
1
Min
Typ
Max
Min
Max
Unit
Propagation delay
D
n
to O
n
t
PLH
5.0
1.0
8.5
10.0
1.0
11.5
ns
Propagation delay
D
n
to O
n
t
PHL
5.0
1.0
8.0
10.0
1.0
11.5
ns
Propagation delay
LE to O
n
t
PLH
5.0
1.0
8.5
11.0
1.0
11.5
ns
Propagation delay
LE to O
n
t
PHL
5.0
1.0
8.0
10.0
1.0
11.5
ns
Output enable time
t
PZH
5.0
1.0
8.0
9.5
1.0
10.5
ns
Output enable time
t
PZL
5.0
1.0
7.5
9.0
1.0
10.5
ns
Output disable time
t
PHZ
5.0
1.0
9.0
11.0
1.0
12.5
ns
Output disable time
t
PLZ
5.0
1.0
7.5
8.5
1.0
10.0
ns
Note:
1. Voltage Range 5.0 is 5.0 V
0.5 V
AC Operating Requirements: HD74AC373
Ta = +25
C
C
L
= 50 pF
Ta = 40
C
to +85
C
C
L
= 50 pF
Item
Symbol
V
CC
(V)*
1
Typ
Guaranteed Minimum
Unit
Setup time, HIGH or LOW
t
su
3.3
3.5
5.5
6.0
ns
D
n
to LE
5.0
2.0
4.0
4.5
Hold time, HIGH or LOW
t
h
3.3
3.0
0.0
0.0
ns
D
n
to LE
5.0
1.5
0.0
0.0
LE pulse width, HIGH
t
w
3.3
4.0
5.5
6.0
ns
5.0
2.0
4.0
4.5
Note:
1. Voltage Range 3.3 is 3.3 V
0.3 V
Voltage Range 5.0 is 5.0 V
0.5 V