ChipFind - документация

Электронный компонент: HD74ALVCH162721

Скачать:  PDF   ZIP
HD74ALVCH162721
3.3-V 20-bit Flip Flops with 3-state Outputs
ADE-205-184B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH162721's twenty flip flops are edge triggered D-type flip flops with qualified clock
storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs,
provided that the clock enable (
CLKEN) input is low. If CLKEN is high, no data is stored. A buffered
output enable (
OE) input can be used to place the twenty outputs in either a normal logic state (high or low
level) or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus
lines significantly. The high impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components. The output enable (
OE) input does not affect the internal
operation of the flip flops. Old data can be retained or new data can be entered while the outputs are in the
high impedance state. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid
logic level. All outputs, which are designed to sink up to 12 mA, include 26
resistors to reduce
overshoot and undershoot.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25
C)
High output current
12 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
All outputs have equivalent 26
series resistors, so no external resistors are required.
HD74ALVCH162721
2
Function Table
Inputs
Output Q
OE
CLKEN
CLK
D
L
H
X
X
Q
0
*1
L
L
H
H
L
L
L
L
L
L
L or H
X
Q
0
*1
H
X
X
X
Z
H : High level
L : Low level
X : Immaterial
Z : High impedance
: Low to high transition
Note:
1. Output level before the indicated steady state input conditions were established.
HD74ALVCH162721
3
Pin Arrangement
(Top view)
1
2
3
4
5
6
7
8
9
10
V
CC
V
CC
Q1
Q2
GND
Q3
Q4
Q5
Q6
Q7
GND
Q8
Q9
Q10
Q11
Q12
Q13
GND
Q14
Q15
Q16
Q17
Q18
OE
11
12
13
14
15
16
17
18
19
20
21
22
23
24
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
D18
GND 25
32 GND
Q19 26
31 D19
Q20 27
30 D20
NC 28
29
CLKEN
D17
D16
D15
D14
D13
GND
D12
D11
D10
D9
D8
GND
D7
D6
D5
D4
D3
D2
CLK
GND
D1
V
CC
V
CC
HD74ALVCH162721
4
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
V
CC
0.5 to 4.6
V
Input voltage
*1
V
I
0.5 to 4.6
V
Output voltage
*1, 2
V
O
0.5 to V
CC
+0.5
V
Input clamp current
I
IK
50
mA
V
I
< 0
Output clamp current
I
OK
50
mA
V
O
< 0 or V
O
> V
CC
Continuous output current
I
O
50
mA
V
O
= 0 to V
CC
V
CC
, GND current / pin
I
CC
or I
GND
100
mA
Maximum power dissipation
at Ta = 55
C (in still air)
*3
P
T
1
W
TSSOP
Storage temperature
Tstg
65 to 150
C
Notes:
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150
C
and a board trace length of 750 mils.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Conditions
Supply voltage
V
CC
2.3
3.6
V
Input voltage
V
I
0
V
CC
V
Output voltage
V
O
0
V
CC
V
High level output current
I
OH
--
6
mA
V
CC
= 2.3 V
--
8
V
CC
= 2.7 V
--
12
V
CC
= 3.0 V
Low level output current
I
OL
--
6
mA
V
CC
= 2.3 V
--
8
V
CC
= 2.7 V
--
12
V
CC
= 3.0 V
Input transition rise or fall rate
t /
v
0
10
ns / V
Operating temperature
Ta
40
85
C
Note:
Unused control inputs must be held high or low to prevent them from floating.
HD74ALVCH162721
5
Logic Diagram
OE
CLK
1
56
55
CLKEN
D1
29
Q1
To nineteen other channels
2
1D
CE
C1