HD74HC114
Dual J-K Flip-Flops (with Preset, Common Clear and
Common Clock)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock
pulse. each flip-flop has independent J, K and preset inputs and Q and
Q outputs. Two flip-flops are
controlled by a common clear and a common clock. Preset and clear are independent of the clock and
accomplished by a low logic level on the corresponding input.
Features
High Speed Operation: t
pd
(Clock to Q) = 18 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
CC
(static) = 2 A max (Ta = 25C)
HD74HC114
2
Function Table
Inputs
Output
Preset
Clear
Clock
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
H*
1
H*
1
H
H
L
L
No change
H
H
L
H
L
H
H
H
H
L
H
L
H
H
H
H
Toggle
H
H
L
X
X
No change
H
H
H
X
X
No change
H
H
X
X
No change
Note:
1. Q and
Q
will remain HIGH as long as Preset and Clear are Low, but Q and
Q
are unpredictable,
if Preset and Clear go HIGH simultaneously.
Pin Arrangement
1
(Top view)
2
3
4
5
6
7
CLK
1K
1J
1PR
1Q
1
Q
GND
V
CC
CK
2K
2J
2PR
2Q
2
Q
14
13
12
11
10
9
8
PR
PR
K
J
CK
Q
Q
PR
PR
K
J
CK
Q
Q
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