HD74HC373/HD74HC533
Octal D-type Transparent Latches (with 3-state outputs)
Octal D-type Transparent Latches (with inverted 3-state outputs)
Description
When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q
outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at
the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is
applied to the output control input, all outputs go to a high impedance state, regardless of what signals are
present at the other inputs and the state of the storage elements.
Features
High Speed Operation: t
pd
(D to Q) = 16 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
CC
(static) = 4 A max (Ta = 25C)
Function Table
Output Control
Enable
G
D
HD74HC373
Q
HD74HC533
Q
L
H
H
H
L
L
H
L
L
H
L
L
X
No change
No change
H
X
X
Z
Z
X :
irrelevant
Z
:
Off (high-impedance) state of a 3-state output.
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