HD74HCT640/HD74HCT643
Octal Bus Transceivers (with 3-state outputs)
Description
Both the HD74HCT640 and the HD74HCT643 have one active low enable input (
G), and a direction
control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is
low, data flows from B to A.
The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted
data from the A bus to the B bus and non-inverted data from the B bus to the A bus.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: t
pd
(A to B) = 14.5 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 4.5 to 5.5 V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
CC
(static) = 4 A max (Ta = 25C)
Function Table
Control Input
Operation
G
DIR
HD74HCT640
HD74HCT643
L
L
B
data to A bus
B data to A bus
L
H
A
data to B bus
A
data to B bus
H
X
Isolation
Isolation