Document Outline
- Description
- Features
- Ordering Information
- Pin Arrangement
- Pin Description
- Block Diagram
- Operation Table
- Absolute Maximum Ratings
- Recommended DC Operating Conditions
- DC Characteristics
- Capacitance
- AC Characteristics
- Timing Waveforms
- Read Timing Waveform (1) (WE = VIH )
- Read Timing Waveform (2) (WE = VIH , CS = VIL , OE = VIL )
- Read Timing Waveform (3) (WE = VIH, CS = VIL, OE = VIL)
- Write Timing Waveform (1) (WE Controlled)
- Write Timing Waveform (2) (CS Controlled)
- Low V CC Data Retention Characteristics
- Low VCC Data Retention Timing Waveform
- Package Dimensions
- HM62W8511HJP/HLJP Series (CP-36D)
HM62W8511H Series
4M High Speed SRAM (512-kword
8-bit)
ADE-203-750D (Z)
Rev. 1.0
Sep. 15, 1998
Description
The HM62W8511H is a 4-Mbit high speed static RAM organized 512-kword
8-bit. It has realized high
speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed
circuit designing technology. It is most appropriate for the application which requires high speed, high
density memory and wide bit width configuration, such as cache and buffer memory in system. The
HM62W8511H is packaged in 400-mil 36-pin SOJ for high density surface mounting.
Features
Single supply : 3.3 V
0.3 V
Access time 12/15 ns (max)
Completely static memory
No clock or timing strobe required
Equal access and cycle times
Directly TTL compatible
All inputs and outputs
Operating current : 150/130 mA (max)
TTL standby current : 60/50 mA (max)
CMOS standby current : 5 mA (max)
: 1 mA (max) (L-version)
Data retension current : 0.6 mA (max) (L-version)
Data retension voltage : 2 V (min) (L-version)
Center V
CC
and V
SS
type pinout
HM62W8511H Series
2
Ordering Information
Type No.
Access time
Package
HM62W8511HJP-12
HM62W8511HJP-15
12 ns
15 ns
400-mil 36-pin plastic SOJ (CP-36D)
HM62W8511HLJP-12
HM62W8511HLJP-15
12 ns
15 ns
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A0
A1
A2
A3
A4
CS
I/O1
I/O2
V
CC
V
SS
I/O3
I/O4
WE
A5
A6
A7
A8
A9
NC
A18
A17
A16
A15
OE
I/O8
I/O7
V
SS
V
CC
I/O6
I/O5
A14
A13
A12
A11
A10
NC
(Top View)
HM62W8511HJP/HLJP Series
HM62W8511H Series
3
Pin Description
Pin name
Function
A0 to A18
Address input
I/O1 to I/O8
Data input/output
CS
Chip select
OE
Output enable
WE
Write enable
V
CC
Power supply
V
SS
Ground
NC
No connection
Block Diagram
I/O1
.
.
.
I/O8
WE
Input
data
control
Column I/O
Column decoder
Memory matrix
256 rows
8 columns
256 blocks
8 bit
(4,194,304 bits)
Row
decoder
OE
CS
CS
CS
V
CC
V
SS
CS
A1
A17
A7
A11
A16
A2
A6
A5
A10 A8 A9 A12 A13 A14 A0 A18 A15 A3 A4
(LSB)
(MSB)
(LSB)
(MSB)
HM62W8511H Series
4
Operation Table
CS
OE
WE
Mode
V
CC
current
I/O
Ref. cycle
H
Standby
I
SB
, I
SB1
High-Z
--
L
H
H
Output disable
I
CC
High-Z
--
L
L
H
Read
I
CC
Dout
Read cycle (1) to (3)
L
H
L
Write
I
CC
Din
Write cycle (1)
L
L
L
Write
I
CC
Din
Write cycle (2)
Note:
: H or L
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Supply voltage relative to V
SS
V
CC
0.5 to +4.6
V
Voltage on any pin relative to V
SS
V
T
0.5*
1
to V
CC
+0.5*
2
V
Power dissipation
P
T
1.0
W
Operating temperature
Topr
0 to +70
C
Storage temperature
Tstg
55 to +125
C
Storage temperature under bias
Tbias
10 to +85
C
Notes: 1. V
T
(min) = 2.0 V for pulse width (under shoot)
8 ns
2. V
T
(max) = V
CC
+2.0 V for pulse width (over shoot)
8 ns
Recommended DC Operating Conditions (Ta = 0 to +70
C)
Parameter
Symbol
Min
Typ
Max
Unit
Supply voltage
V
CC
*
3
3.0
3.3
3.6
V
V
SS
*
4
0
0
0
V
Input voltage
V
IH
2.2
--
V
CC
+ 0.5*
2
V
V
IL
0.5*
1
--
0.8
V
Notes: 1. V
IL
(min) = 2.0 V for pulse width (under shoot)
8 ns
2. V
IH
(max) = V
CC
+2.0 V for pulse width (over shoot)
8 ns
3. The supply voltage with all V
CC
pins must be on the same level.
4. The supply voltage with all V
SS
pins must be on the same level.
HM62W8511H Series
5
DC Characteristics (Ta = 0 to +70
C, V
CC
= 3.3 V
0.3 V, V
SS
= 0V)
Parameter
Symbol Min
Typ*
1
Max
Unit
Test conditions
Input leakage current
II
LI
I
--
--
2
A
Vin = V
SS
to V
CC
Output leakage current
II
LO
I
--
--
2
A
Vin = V
SS
to V
CC
Operation power
supply current
12 ns cycle I
CC
--
--
150
mA
Min cycle
CS
= V
IL
, lout = 0 mA
Other inputs = V
IH
/V
IL
15 ns cycle I
CC
--
--
130
Standby power supply
current
12 ns cycle I
SB
--
--
60
mA
Min cycle
CS
= V
IH
,
Other inputs = V
IH
/V
IL
15 ns cycle I
SB
--
--
50
I
SB1
--
0.05
5
mA
f = 0 MHz
V
CC
CS
V
CC
- 0.2 V,
(1) 0 V
Vin
0.2 V or
(2) V
CC
Vin
V
CC
- 0.2 V
--*
2
0.05*
2
1.0*
2
Output voltage
V
OL
--
--
0.4
V
I
OL
= 8 mA
V
OH
2.4
--
--
V
I
OH
= 4 mA
Notes: 1. Typical values are at V
CC
= 3.3 V, Ta = +25
C and not guaranteed.
2. This characteristics is guaranteed only for L-version.
Capacitance (Ta = +25
C, f = 1.0 MHz)
Parameter
Symbol
Min
Typ
Max
Unit
Test conditions
Input capacitance*
1
Cin
--
--
6
pF
Vin = 0 V
Input/output capacitance*
1
C
I/O
--
--
8
pF
V
I/O
= 0 V
Note: 1. This parameter is sampled and not 100% tested.
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