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Электронный компонент: HT12EA

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HT12A/HT12E
2
12
Series of Encoders
Selection Table
Function Address
No.
Address/
Data No.
Data No. Oscillator
Trigger
Carrier
Output
Negative
Polarity
Package
Part No.
HT12A
8
0
4
455kHz
resonator
D8~D11
38kHz
No
18DIP, 20SOP
HT12E
8
4
0
RC
oscillator
TE
No
No
18DIP, 20SOP
Note:
Address/Data represents pins that can be either address or data according to the application requirement.
Rev. 1.10
1
January 24, 2003
General Description
The 2
12
encoders are a series of CMOS LSIs for remote
control system applications. They are capable of encod-
ing information which consists of N address bits and
12
-N data bits. Each address/data input can be set to
one of the two logic states. The programmed ad-
dresses/data are transmitted together with the header
bits via an RF or an infrared transmission medium upon
receipt of a trigger signal. The capability to select a TE
trigger on the HT12E or a DATA trigger on the HT12A
further enhances the application flexibility of the 2
12
se-
ries of encoders. The HT12A additionally provides a
38kHz carrier for infrared systems.
Features
Operating voltage
-
2.4V~5V for the HT12A
-
2.4V~12V for the HT12E
Low power and high noise immunity CMOS
technology
Low standby current: 0.1
mA (typ.) at V
DD
=5V
HT12A with a 38kHz carrier for infrared transmission
medium
Minimum transmission word
-
Four words for the HT12E
-
One word for the HT12A
Built-in oscillator needs only 5% resistor
Data code has positive polarity
Minimal external components
Pair with Holtek
s 2
12
series of decoders
18-pin DIP, 20-pin SOP package
Applications
Burglar alarm system
Smoke and fire alarm system
Garage door controllers
Car door controllers
Car alarm system
Security system
Cordless telephones
Other remote control systems
Block Diagram
TE Trigger
HT12E
DATA Trigger
HT12A
Note:
The address data pins are available in various combinations (refer to the address/data table).
Pin Assignment
HT12A/HT12E
Rev. 1.10
2
January 24, 2003
O s c i l l a t o r
3 D i v i d e r
O S C 1
O S C 2
V D D
V S S
1 2 T r a n s m i s s i o n
G a t e C i r c u i t
1 2 C o u n t e r &
1 o f 1 2 D e c o d e r
B i n a r y D e t e c t o r
T E
A 0
A 7
D O U T
D a t a S e l e c t
& B u f f e r
S y n c .
C i r c u i t
A D 8
A D 1 1
O s c i l l a t o r
5 7 6 D i v i d e r
V D D
V S S
1 2 T r a n s m i s s i o n
G a t e C i r c u i t
1 2 C o u n t e r &
1 o f 1 2 D e c o d e r
B i n a r y D e t e c t o r
D O U T
D a t a S e l e c t
& B u f f e r
S y n c .
C i r c u i t
L / M B
X 2
X 1
A 0
A 7
D 8
D 1 1
8 - A d d r e s s
4 - D a t a
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
V D D
D O U T
X 1
X 2
L / M
D 1 1
D 1 0
D 9
D 8
1
2
3
4
5
6
7
8
9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
8 - A d d r e s s
4 - D a t a
1
2
3
4
5
6
7
8
9
1 0
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
N C
V D D
D O U T
X 1
X 2
L / M
D 1 1
D 1 0
D 9
D 8
N C
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
H T 1 2 A
1 8 D I P - A
H T 1 2 A
2 0 S O P - A
8 - A d d r e s s
4 - A d d r e s s / D a t a
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
V D D
D O U T
O S C 1
O S C 2
T E
A D 1 1
A D 1 0
A D 9
A D 8
1
2
3
4
5
6
7
8
9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
H T 1 2 E
1 8 D I P - A
8 - A d d r e s s
4 - A d d r e s s / D a t a
1
2
3
4
5
6
7
8
9
1 0
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
N C
V D D
D O U T
O S C 1
O S C 2
T E
A D 1 1
A D 1 0
A D 9
A D 8
N C
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
H T 1 2 E
2 0 S O P - A
Pin Description
Pin Name
I/O
Internal
Connection
Description
A0~A7
I
CMOS IN Pull-high
(HT12A)
Input pins for address A0~A7 setting
These pins can be externally set to VSS or left open
NMOS TRANSMISSION
GATE PROTECTION
DIODE (HT12E)
AD8~AD11
I
NMOS TRANSMISSION
GATE PROTECTION
DIODE (HT12E)
Input pins for address/data AD8~AD11 setting
These pins can be externally set to VSS or left open
D8~D11
I
CMOS IN Pull-high
Input pins for data D8~D11 setting and transmission enable, active
low
These pins should be externally set to VSS or left open (see Note)
DOUT
O
CMOS OUT
Encoder data serial transmission output
L/M
I
CMOS IN Pull-high
Latch/Momentary transmission format selection pin:
Latch: Floating or VDD
Momentary: VSS
TE
I
CMOS IN Pull-high
Transmission enable, active low (see Note)
OSC1
I
OSCILLATOR 1
Oscillator input pin
OSC2
O
OSCILLATOR 1
Oscillator output pin
X1
I
OSCILLATOR 2
455kHz resonator oscillator input
X2
O
OSCILLATOR 2
455kHz resonator oscillator output
VSS
I
Negative power supply, ground
VDD
I
Positive power supply
Note:
D8~D11 are all data input and transmission enable pins of the HT12A.
TE is a transmission enable pin of the HT12E.
Approximate Internal Connections
HT12A/HT12E
Rev. 1.10
3
January 24, 2003
N M O S
T R A N S M I S S I O N
G A T E
C M O S I N
P u l l - h i g h
C M O S O U T
O S C I L L A T O R 1
O S C 2
O S C 1
O S C I L L A T O R 2
X 1
X 2
E N
N M O S T R A N S M I S S I O N G A T E
P R O T E C T I O N D I O D E
V
D D
Absolute Maximum Ratings
Supply Voltage (HT12A) ............V
SS
-0.3V to V
SS
+5.5V
Supply Voltage (HT12E) ...........................
-0.3V to 13V
Input Voltage ................................V
SS
-0.3 to V
DD
+0.3V
Storage Temperature ............................
-50C to 125C
Operating Temperature ...........................
-20C to 75C
Note: These are stress ratings only. Stresses exceeding the range specified under
Absolute Maximum Ratings may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
Electrical Characteristics
HT12A
Ta=25
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Operating Voltage
2.4
3
5
V
I
STB
Standby Current
3V
Oscillator stops
0.1
1
mA
5V
0.1
1
mA
I
DD
Operating Current
3V
No load
f
OSC
=455kHz
200
400
mA
5V
400
800
mA
I
DOUT
Output Drive Current
5V
V
OH
=0.9V
DD
(Source)
-1
-1.6
mA
V
OL
=0.1V
DD
(Sink)
2
3.2
mA
V
IH
H Input Voltage
0.8V
DD
V
DD
V
V
IL
L Input Voltage
0
0.2V
DD
V
R
DATA
D8~D11 Pull-high
Resistance
5V
V
DATA
=0V
150
300
k
W
HT12E
Ta=25
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Operating Voltage
2.4
5
12
V
I
STB
Standby Current
3V
Oscillator stops
0.1
1
mA
12V
2
4
mA
I
DD
Operating Current
3V
No load, f
OSC
=3kHz
40
80
mA
12V
150
300
mA
I
DOUT
Output Drive Current
5V
V
OH
=0.9V
DD
(Source)
-1
-1.6
mA
V
OL
=0.1V
DD
(Sink)
1
1.6
mA
V
IH
H Input Voltage
0.8V
DD
V
DD
V
V
IL
L Input Voltage
0
0.2V
DD
V
f
OSC
Oscillator Frequency
5V
R
OSC
=1.1M
W
3
kHz
R
TE
TE Pull-high Resistance
5V
V
TE
=0V
1.5
3
M
W
HT12A/HT12E
Rev. 1.10
4
January 24, 2003
Functional Description
Operation
The 2
12
series of encoders begin a 4-word transmission cycle upon receipt of a transmission enable (TE for the HT12E
or D8~D11 for the HT12A, active low). This cycle will repeat itself as long as the transmission enable (TE or D8~D11) is
held low. Once the transmission enable returns high the encoder output completes its final cycle and then stops as
shown below.
Information Word
If L/M=1 the device is in the latch mode (for use with the latch type of data decoders). When the transmission enable is re-
moved during a transmission, the DOUT pin outputs a complete word and then stops. On the other hand, if L/M=0 the de-
vice is in the momentary mode (for use with the momentary type of data decoders). When the transmission enable is
removed during a transmission, the DOUT outputs a complete word and then adds 7 words all with the
1 data code.
An information word consists of 4 periods as illustrated below.
HT12A/HT12E
Rev. 1.10
5
January 24, 2003
4 w o r d s
4 w o r d s
E n c o d e r
D O U T
T r a n s m i t t e d
C o n t i n u o u s l y
< 1 w o r d
T E
Transmission timing for the HT12E
E n c o d e r
D O U T
T r a n s m i t t e d
C o n t i n u o u s l y
< 1 w o r d
D 8 ~ D 1 1
K e y - i n
1 w o r d
w i t h 3 8 k H z c a r r i e r
1 w o r d
Transmission timing for the HT12A (L/M=Floating or VDD)
E n c o d e r
D O U T
T r a n s m i t t e d
C o n t i n u o u s l y
D 8 ~ D 1 1
K e y - i n
1 w o r d
< 1 w o r d
7 w o r d s
1 w o r d
7 w o r d s
( a l l d a t a = 1 )
( a l l d a t a = 1 )
Transmission timing for the HT12A (L/M=VSS)
1 / 3 b i t s y n c . p e r i o d
p i l o t p e r i o d ( 1 2 b i t s )
a d d r e s s c o d e p e r i o d
p e r i o d
d a t a c o d e
Composition of information