HT23B60
6011 Pixel Data Bank 8-Bit Mask MCU
Block Diagram
Rev. 1.10
1
March 1, 2004
Features
Operating voltage range: 2.4V~5.5V
Program ROM: 32K
16 bits
Data RAM: 2.3K
8 bits
16-bit table read instructions
Eight-level subroutine nesting
Timer
-
Two 16-bit programmable timer counters
-
Real time clock (RTC)
-
Watchdog Timer (WDT)
Four operating modes: Idle mode, Sleep mode,
Green mode and Normal mode
Built-in 32768Hz x
tal oscillator circuit
Build-in circuit dual system clock 32768Hz, 3.58MHz
Build-in Low Battery detector
14 bidirectional I/O lines, 16 bidirectional I/O lines are
share pin with segments
LCD driver:
-
Up to a max. of 60 segments and 11 common
-
660 dots, 1/4 or 1/5 bias capability, 1/10 or 1/11
duty, R type
-
LCD com/seg driving strength can be adjusted to
compromise the display quality and current
consumption, adjustable 16-level VLCD
-
Segment 0~15 supports Key Scan function
Build-in a serial-parallel-interface hardware circuit
Build-in a 8-bit PWM D/A hardware circuit
100-pin QFP package
General Description
HT23B60 is an 8-bit CMOS microcontroller with various
functionalities in a compact package such as SRAM,
ROM I/Os, interrupt controller, timer and LCD control-
ler/driver. It
s suitable for use as electrical data bank,
LCD game, calendar and speech products.
P r o g r a m
C o u n t e r
P r o g r a m
R O M
I n s t r u c t i o n
R e g i s t e r
I n s t r u c t i o n
D e c o d e r
T i m i n g
G e n e r a t o r
I N T C
I n t e r r u p t
C i r c u i t
M
U
X
M U X
D A T A
M e m o r y
A L U
S h i f t e r
S T A T U S
A C C
S T A C K 4
S T A C K 5
S T A C K 6
S T A C K 7
S T A C K 0
S T A C K 1
S T A C K 2
S T A C K 3
M P 1
M P 0
R T C
3 2 7 6 8 H z
O S C C i r c u i t
W D T S
W D T P r e s c a l e r
3 2 7 6 8 H z
S y s t e m C l o c k / 4
W D T O S C
T M R 0 C
T M R 0
T M R 2
M
U
X
S Y S C L K / 4
P A
P A C
P B
P B C
P F D
P A 0 ~ P A 7
P B 0 ~ P B 5
X I N
X O U T
X C
S E G 0 ~ 1 5
K e y S c a n S t r o b e
L C D D r i v e r
6 0 1 1
1 / 4 , 1 / 5 B i a s
1 / 1 0 , 1 / 1 1 D u t y
I N T / P B 3
T M R 2 C
3 . 5 8 M H z / 4
3 2 7 6 8 H z
M
U
X
M
U
X
P W M D A C 1
P W M D A C 2
P W M 1
P W M 2
S e r i a l
I n t e r f a c e
S C L K / P B 0
L o w V o l t a g e D e t e c t o r
D I / P B 2
D O / P B 1
L B I N
L C D
M e m o r y
3 . 5 8 M H z
V L C D
C O M 0
C O M 1
C O M 9
C O M 1 0
S E G 0
S E G 1
S E G 5 8
S E G 5 9
R E S
Pin Assignment
HT23B60
Rev. 1.10
2
March 1, 2004
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0
8 1
8 2
8 3
8 4
8 5
8 6
8 7
8 8
8 9
9 0
9 1
9 2
9 3
9 4
9 5
9 6
9 7
9 8
9 9
1 0 0
8 0
7 9
7 8
7 7
7 6
7 5
7 4
7 3
7 2
7 1
7 0
6 9
6 8
6 7
6 6
6 5
6 4
6 3
6 2
6 1
6 0
5 9
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
S E G 3 2
S E G 3 1
S E G 3 0
S E G 2 9
S E G 2 8
S E G 2 7
S E G 2 6
S E G 2 5
S E G 2 4
S E G 2 3
S E G 2 2
S E G 2 1
S E G 2 0
S E G 1 9
S E G 1 8
S E G 1 7
S E G 1 6
S E G 1 5
S E G 1 4
S E G 1 3
S E G 1 2
S E G 1 1
S E G 1 0
S E G 9
S E G 8
S E G 7
S E G 6
S E G 5
S E G 4
S E G 3
G
N
D
V
C
C
R
E
S
P
B
0
/
S
C
L
K
P
B
1
/
D
O
P
B
2
/
D
I
P
B
3
/
I
N
T
P
B
4
P
B
5
P
A
0
P
A
1
P
A
2
P
A
3
P
A
4
P
A
5
P
A
6
P
A
7
S
E
G
0
S
E
G
1
S
E
G
2
S E G 5 3
S E G 5 4
N C
N C
S E G 5 5
S E G 5 6
S E G 5 7
S E G 5 8
S E G 5 9
C O M 0
C O M 1
C O M 2
C O M 3
C O M 4
C O M 5
C O M 6
C O M 7
C O M 8
C O M 9
C O M 1 0
N C
V L C D
L B I N
X C
X I N
X O U T
P W M 2
P W M 1
N C
N C
S
E
G
5
2
S
E
G
5
1
S
E
G
5
0
S
E
G
4
9
S
E
G
4
8
S
E
G
4
7
S
E
G
4
6
S
E
G
4
5
S
E
G
4
4
S
E
G
4
3
S
E
G
4
2
S
E
G
4
1
S
E
G
4
0
S
E
G
3
9
S
E
G
3
8
S
E
G
3
7
S
E
G
3
6
S
E
G
3
5
S
E
G
3
4
S
E
G
3
3
H T 2 3 B 6 0
1 0 0 Q F P - A
Pad Description
Pad No.
Pad Name
I/O
Mask
Option
Description
4~1
SEG0~3
O
Selectable as LCD segment signal output or keyscan strobe signal.
12~5
PA0~PA7
I/O
Wake-up
or None
Bidirectional 8-bit input/output port. Each bit can be configured as
wake-up input by mask option. Software instructions determine the
CMOS output or Schmitt trigger input with or without pull-high regis-
ter by register [35H].
14~13
PB4~PB5
I/O
Bidirectional 2-bit input/output port
Schmitt trigger input with or without pull-high register by software op-
tion or CMOS output
15
PB3/INT
I/O
Software instructions determine the bidirectional input/output pin or
external interrupt Schmitt trigger input or CMOS output. When the
[INTC0].1 is set to
1 the PB3 will used to external interrupt input pin.
For I/O pin: Schmitt trigger input with or without pull-high register by
software option or CMOS output
For INT: Edge trigger activated on a falling edge.
16
PB2/DI
I/O
or
I
Serial
Data Input
Can be optioned as bidirectional input/output or serial data input.
For I/O pin: Schmitt trigger input or CMOS output, see mask option
table for pull-high function
For serial data input: serial data input without pull-high resistor
17
PB1/DO
I/O
or
O
Serial
Data
Output
Can be optioned as bidirectional input/output or serial data output.
For I/O pin: Schmitt trigger input or CMOS output, see mask option
table for pull-high function
For serial data output: SK is a CMOS output
18
PB0/SCLK
I/O
SCLK
Signal
Can be optioned as bidirectional input/output or serial interface clock
signal.
For I/O pin: Schmitt trigger input with or without pull-high resistor by
register [36H] or CMOS output
For serial interface clock signal: Use as serial I/O interface clock
signal
SCLK should be set as serial clock output and after 8 clocks from the
SCLK terminal, clock output is automatically suspended.
19
RES
I
Schmitt trigger reset input. Active low.
20, 21
VDD
Positive power supply
22, 23
VSS
Negative power supply, ground
24
PWM1
O
Positive PWM CMOS output
25
PWM2
O
Negative PWM CMOS output
26
XOUT
O
A 32768Hz crystal (or resonator) should be connected to this pin and
XIN
27
XIN
I
A 32768Hz crystal (or resonator) should be connected to this pin and
XOUT
28
XC
I
External low pass filter used for frequency up conversion circuit
29
31
33
35
37
TRIM0
TRIM1
TRIM2
TRIM3
TRIM4
Test pin only
30
LBIN
I
This pin detects battery low through external R1/R2 to determine
threshold, when the low voltage detect function is disabled, the
LBIN pin should be connected to VDD.
32
VLCD
I
LCD voltage input
HT23B60
Rev. 1.10
5
March 1, 2004
PDF 
ZIP
