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Электронный компонент: GM71CS17403CJ/CLJ-7

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GM71C(S)17403C/CL
4,194,304 WORDS x 4 BIT
CMOS DYNAMIC RAM
Description
The GM71C(S)17403C/CL is the new
generation dynamic RAM organized 4,194,304
words x 4 bit. GM71C(S)17403C/CL has
realized higher density, higher performance and
various functions by utilizing advanced CMOS
process technology. The GM71C(S)17403C/CL
offers Extended Data Out (EDO) Mode as a
high speed access mode. Multiplexed address
inputs permit the GM71C(S)17403C/CL to be
packaged in a standard 300 mil 24(26) pin SOJ
and a standard 300mil 24(26) pin plastic TSOP
II. The package size provides high system bit
densities and is compatible with widely
available automated testing and insertion
equipment. System oriented features include
single power supply 5V+/-10% tolerance, direct
interfacing capability with high performance
logic families such as Schottky TTL.
Features
* 4,194,304 Words x 4 Bit Organization
* Extended Data Out Mode Capability
* Single Power Supply (5V+/-10%)
* Fast Access Time & Cycle Time
* Low Power
Active : 660/605/550mW (MAX)
Standby : 11mW (CMOS level : MAX)
: 0.83mW (L-version : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 2048 Refresh Cycles/32ms
* 2048 Refresh Cycles/128ms (L-version)
* Battery Backup Operation (L-version)
* Test Function : 16bit parallel test mode
(Unit: ns)
t
RAC
t
CAC
t
RC
t
HPC
GM71C(S)17403C/CL-6
GM71C(S)17403C/CL-7
60
70
15
18
104
124
25
30
GM71C(S)17403C/CL-5
50
13
84
20
Pin Configuration
(Top View)
V
CC
I/O1
I/O2
WE
RAS
NC
A10
A0
A1
A2
A3
V
CC
V
SS
I/O4
I/O3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
21
22
23
24
25
26
24(26) SOJ
24(26) TSOP II
V
CC
I/O1
I/O2
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
V
SS
I/O4
I/O3
CAS
OE
A9
A8
A7
A6
A5
A4
V
SS
1
2
3
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
21
22
23
24
25
26
Rev 0.1 / Apr'01
GM71C(S)17403C/CL
Rev 0.1 / Apr'01
Pin Description
Pin
Function
Pin
Function
A0-A10
A0-A10
I/O1-I/O4
V
CC
V
SS
Address Inputs
Refresh Address Inputs
Data-input/Data-output
Row Address Strobe
Column Address Strobe
Read/Write Enable
Output Enable
Power (+5V)
Ground
Ordering Information
Absolute Maximum Ratings*
Symbol
Parameter
Rating
Unit
T
A
T
STG
V
IN
/V
OUT
V
CC
I
OUT
0 ~ 70
-55 ~ 125
-1.0 ~ 7.0
-1.0 ~ 7.0
50
Ambient Temperature under Bias
Storage Temperature (Plastic)
Voltage on any Pin Relative to V
SS
Voltage on V
CC
Relative to V
SS
Short Circuit Output Current
V
V
mA
P
D
1.0
Power Dissipation
W
Note: Operation at or above Absolute Maximum Ratings can adversely affect device reliability.
RAS
CAS
Recommended DC Operating Conditions (T
A
= 0 ~ 70C)
Symbol
Parameter
Unit
V
CC
V
IH
V
IL
Supply Voltage
Input High Voltage
Input Low Voltage
V
V
V
Max
5.5
6.5
0.8
Typ
5.0
-
-
Min
4.5
2.4
-1.0
WE
OE
C
C
NC
No Connection
Type No.
Access Time
Package
GM71C(S)17403CJ/CLJ-5
GM71C(S)17403CJ/CLJ-6
GM71C(S)17403CJ/CLJ-7
50ns
60ns
70ns
300 Mil
24(26) Pin
Plastic SOJ
GM71C(S)17403CT/CLT-5
GM71C(S)17403CT/CLT-6
GM71C(S)17403CT/CLT-7
300 Mil
24(26) Pin
Plastic TSOP II
50ns
60ns
70ns
GM71C(S)17403C/CL
Rev 0.1 / Apr'01
DC Electrical Characteristics (V
CC
= 5.0V+/-10%, V
SS
= 0V, T
OPR
= 0 ~ 70C)
Symbol
Parameter
Note
V
OH
V
OL
Output Level
Output "H" Level Voltage (I
OUT
=
-2mA
)
Unit
Max
V
CC
0.4
Min
2.0
0
Output Level
Output "L" Level Voltage (I
OUT
=
2
mA)
I
CC1
Operating Current
Average Power Supply Operating Current
(RAS, CAS Cycling
:
t
RC
=
t
RC
min)
I
CC2
Standby Current (TTL)
Power Supply Standby Current
(RAS, CAS = V
IH
,
D
OUT
=
High-Z)
I
CC3
RAS Only Refresh Current
Average Power Supply Current
RAS Only Refresh Mode
(t
RC
=
t
RC
min)
I
CC4
I
CC5
Standby Current (CMOS)
Power Supply Standby Current
(RAS, CAS >= V
CC
- 0.2V, D
OUT
= High-Z)
1
-
I
CC6
CAS-before-RAS Refresh Current
(t
RC
=
t
RC
min)
I
CC7
150
-
I
CC8
I
L(I)
10
-10
I
L(O)
10
-10
Input Leakage Current
Any Input (0V
<=
V
IN
<=
6V)
Output Leakage Current
(D
OUT
is Disabled, 0V
<=
V
OUT
<= 6
V)
Note: 1. I
CC
depends on output load condition when the device is selected.
I
CC
(max) is specified at the output open condition.
2. Address can be changed once or less while RAS = V
IL
.
3. Address can be changed once or less while CAS = V
IH
.
4. CAS = L (<=0.2) while RAS = L (<=0.2).
5. L-version.
EDO Page Mode Current
Average Power Supply Current
EDO Page Mode
(t
HPC
= t
HPC
min)
120
-
50ns
60ns
70ns
110
100
-
2
-
-
100
-
50ns
60ns
70ns
90
80
-
-
-
90
-
50ns
60ns
70ns
80
70
-
V
V
mA
uA
uA
-
Standby Current RAS = V
IH
CAS = V
IL
D
OUT
=
Enable
5
1
mA
Battery Backup Operating Current(Standby with CBR Refresh)
(CBR refresh, t
RC
= 62.5us
,
t
RAS
<=
0.3
us,
D
OUT
=
High-Z, CMOS interface)
350
-
uA
4,5
uA
5
mA
1, 2
mA
mA
2
mA
1, 3
mA
100
-
50ns
60ns
70ns
-
-
90
80
GM71C(S)17403C/CL
Rev 0.1 / Apr'01
Capacitance (V
CC
= 5V+/-10%, T
A
= 25C)
AC Characteristics (V
CC
= 5V+/-10%, T
A
= 0 ~ 70C, Notes 1, 2, 18, 19)
Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)
Symbol
Parameter
Note
C
I1
C
I2
C
I/O
Input Capacitance (Address)
Input Capacitance (Clocks)
Output Capacitance (Data-In/Out)
1
1
1, 2
Unit
pF
pF
pF
Max
5
7
7
Min
-
-
-
Test Conditions
Input rise and fall times: 2 ns
Input timing reference levels: 0.8V, 2.4V
Output timing reference levels: 0.8V, 2.0V
Output load : 1 TTL gate + C
L
(100pF)
(Including scope and jig)
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. CAS = V
IH
to disable D
OUT
.
Symbol
Parameter
Note
Max
Unit
Min
Max
Min
Max
Min
t
RC
84
-
104
-
124
-
t
RP
30
-
40
-
50
-
t
RAS
50
10,000
60
10,000
70
10,000
t
CAS
7
10,000
10,000
10,000
10
13
t
ASR
0
-
-
-
0
0
t
RAH
7
-
-
-
10
10
t
ASC
0
-
-
-
0
0
t
CAH
7
-
-
-
10
13
t
RCD
11
37
45
52
14
14
3
t
RAD
9
25
30
35
12
12
4
t
RSH
10
-
-
-
13
13
t
CSH
35
-
-
-
40
45
t
CRP
5
-
-
-
5
5
t
T
2
50
50
50
2
2
7
t
DZO
0
-
-
-
0
0
t
DZC
0
-
-
-
0
0
GM71C(S)17403
C/CL-5
13
-
-
-
15
18
5
6
6
t
CP
7
-
10
-
13
-
Random Read or Write Cycle Time
RAS Precharge Time
RAS Pulse Width
CAS Pulse Width
Row Address Set up Time
Row Address Hold Time
Column Address Set-up Time
Column Address Hold Time
RAS to CAS Delay Time
RAS to Column Address Delay Time
RAS Hold Time
CAS Hold Time
CAS to RAS Precharge Time
Transition Time (Rise and Fall)
OE Delay Time from D
IN
CAS Delay Time from D
IN
OE to D
IN
Delay Time
CAS Precharge Time
t
ODD
GM71C(S)17403
C/CL-6
GM71C(S)17403
C/CL-7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21
22
24
GM71C(S)17403C/CL
Rev 0.1 / Apr'01
Read Cycle
Symbol
Parameter
Note
Max
Unit
Min
Max
Min
t
RAC
-
60
-
70
t
CAC
-
15
-
18
t
AA
-
30
-
35
t
RCS
0
-
0
-
t
RCH
0
-
-
0
8,9,19
9,10,17,19
9,11,17,19
-
15
-
18
9
12
GM71C(S)17403
C/CL-6
t
OAC
GM71C(S)17403
C/CL-7
t
RRH
5
-
-
5
12
t
RAL
30
-
-
35
t
OFF
15
15
13
-
-
t
CAL
18
-
-
23
t
CLZ
0
-
-
0
t
OEZ
15
15
13,23
-
-
t
OH
3
-
-
3
t
OHO
3
-
-
3
t
CDD
15
-
-
18
5
t
RCHR
t
OHR
t
OFR
t
WEZ
t
WDD
t
RDD
60
70
3
3
15
15
15
15
18
18
-
-
-
-
-
-
-
-
-
-
-
-
Access Time from RAS
Access Time from CAS
Access Time from Address
Read Command Setup Time
Read Command Hold Time to CAS
Access Time from OE
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Output Buffer Turn-off Time
Column Address to CAS Lead Time
CAS to Output in Low-Z
Output Buffer Turn-off Time to OE
Output Data Hold Time
Output Data Hold Time from OE
CAS to D
IN
Delay Time
Read Command Hold Time from RAS
Output Data hold Time from RAS
Output Buffer turn off to RAS
Output Buffer turn off to WE
WE to D
IN
Delay Time
RAS to D
IN
Delay Time
Max
Min
-
50
-
13
-
25
0
-
0
-
-
13
GM71C(S)17403
C/CL-5
5
-
25
-
13
-
15
-
0
-
13
-
3
-
3
-
13
-
50
3
13
13
13
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
13
15
15
13,23
13