HL15703

P r e l i m i n a r y

Contents

1. General Description

2. Features

3. Block Diagram

4. Pin Diagram

5. Pin Description

6. Serial I/O Data Format

7. Registers

8. Key Scan Function

9. LCD Function

10. Power On Reset

11. Power Down Mode

12. Oscillator Port

13. Electrical Characteristics

14. Application

HL15703

P r e l i m i n a r y

1. General Description

The HL15703 is 1/3 duty LCD display driver. It can drive directly maximum
171 segments. Also it has four general purpose output ports and a key scan
function that accepts input from up to 30 keys.

2. Features

· LCD display ..................................... 57 segments x 3 commons

1/3 duty - 1/2 bias
1/3 duty - 1/3 bias

· Key scan ............................................ Maximum 30 keys

Input 5 pins, Output 6 pins

· Power down mode ............................. Sleep mode and all segments off mode
· Port

Output .................................................. 4 pins
( Including the LCD segment port )

· Serial I/O .............................................. Data transfer and receive
· Power on reset ..................................... Supply voltage detection ( SVD )
· RC oscillator
· Package ............................................... 80QFP

0.15

0.1

Package Dimensions

80QFP

Unit : mm

15.5

0.5

2.70

23.2

0.35

0.5

20.0

17.2

14.0

1.5

1.0

3.0

max

21.6

1.0

HL15703

P r e l i m i n a r y

3. Block Diagram

CLOCK

GENERATOR

KEY

SCAN

COMMOM

DRIVER

LCD
BIAS

SVD

OSC

SEGMENT

DRIVER

COM3

COM2

COM1

KS2 / SEG57

KS1 / SEG56

SEG55

SEG5

SEG4 / P4

SEG1 / P1

LCD

DISPLAY & CONTROL

SERIAL

I/O

SI
SO
SCK
CE

VDD

VSS

RESET

CLOCK

KS5

KS4

KS3

KS2

KS1

KIN6

KIN5

KIN4

KIN3

KIN2

KIN1

TEST

CONTROL

TEST

VCL1
VCL2

RES

12.0

14.0

0.135

0.20

12.0

14.0

0.5

0.1

80QFP

Unit : mm

0.5

1.25

1.4

0.5

1.6

max

HL15703

P r e l i m i n a r y

4. Pin Diagram

KS6

KS5

KS4

KS3

KS2 / S57

KS1 / S56

COM3

COM2

COM1

S55

S54

S53

S52

S51

S50

S49

S48

S47

S46

S45

S44

S43

S42

S41

P1 / S1

P2 / S2

P3 / S3

P4 / S4

S10

S11

S12

S13

S14

S15

S16

S17

S18

S19

S20

S21

S22

S23

S24

S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25

KI1
KI2
KI3
KI4
KI5

VDD

VDD1
VDD2

VSS

TEST

OSC

RES

P1 / S1

P2 / S2

P3 / S3

P4 / S4

S10

S11

S12

S13

S14

S15

S16

S17

S18

S19

S20

KS2 / S57

KS1 / S56

COM3

COM2

COM1

S55

S54

S53

S52

S51

S50

S49

S48

S47

S46

S45

S44

S43

S42

S41

S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21

KS3
KS4
KS5
KS6

KI1
KI2
KI3
KI4
KI5

VDD

VDD1
VDD2

VSS

TEST

OSC

RES

HL15703

P r e l i m i n a r y

5. Pin Description

PIN Name

I/O

Pin Number

Contents

SEG[55:1]

LCD SEG Pins share P1,P2,P3 and P4

COM [3:1]

LCD Common Pins

OSC

I/O

Oscillator Input Pin

KS[6:1]

Key Scan Output Pins

KIN[5:1]

Key Scan Input Pins

Serial I/O Control Pin

SCK

Serial I/O Clock Pin

Serial I/O Data Output Pin

VDD

Power Supply Pin

VSS

Ground Pin

VCL[2:1]

LCD Bias Pins

Serial I/O Data Input Pin

TEST

Test Pin. "1" Test mode , "0" Normal Mode

P[4:1]

Output Port share SEG[4:1]

RES

Reset Pin

HL15703

P r e l i m i n a r y

6. Serial I/O Data Format

1) Writing Mode

SCK

B0 B1 B2 B3 A0 A1 A2 A3

D56 D57

Display data

Control data

i )SCK is stopped at the low level

SCK

D115

D116

D117

B0 B1 B2 B3 A0 A1 A2 A3

D170

D171

Display data

Fixed data

SCK

D58

D59 D60

B0 B1 B2 B3 A0 A1 A2 A3

D113

D114

Display data

Fixed data

HL15703

P r e l i m i n a r y

CCB address : 42H
D171~D1 : Display data
S0, S1 : Sleep control data
K0, K1 : Key scan output / Segment output selection data
P0, P1 : Segment output / general-purpose output port selection data
SC : Segment on / off control data
DR : 1/2 bias or 1/3 bias drive selection data

ii )SCK is stopped at the high level

SCK

B3 A0 A1 A2

D56 D57

Display data

Control data

SCK

D59 D60

B0 B1 B2 B3 A0 A1 A2

D113

D114

Display data

Fixed data

D58

SCK

D116

D117

B0 B1 B2 B3 A0 A1 A2

D170

D171

Display data

Fixed data

D115

HL15703

P r e l i m i n a r y

2) Reading Mode

CCB : 43H
K30 ~ K1 : Key data
SA : Sleep acknowledge data

i ) SCK is stopped at the low level

SCK

KD1 KD2 KD3 KD4 KD5 KD6 KD7 KD8 KD9

KD11

KD29

KD10

KD30

KD12

Output data

X : don't care

SCK

KD1 KD2 KD3 KD4 KD5 KD6 KD7 KD8 KD9

KD11

K29

KD10

K30

KD12

Output data

X : don't care

ii ) SCK is stopped at the high level

HL15703

P r e l i m i n a r y

7. Registers

1) Display Registers

Output Pin

COM1

COM2

COM3

SEG1/P1

SEG2/P2

SEG3/P3

SEG4/P4

D10

D11

D12

SEG5

D13

D14

D15

SEG6

D16

D17

D18

SEG7

D19

D20

D21

SEG8

D22

D23

D24

SEG9

D25

D26

D27

SEG10

D28

D29

D30

SEG11

D31

D32

D33

SEG12

D34

D35

D36

SEG13

D37

D38

D39

SEG14

D40

D41

D42

SEG15

D43

D44

D45

SEG16

D46

D47

D48

SEG17

D49

D50

D51

SEG18

D52

D53

D54

SEG19

D55

D56

D57

SEG20

D58

D59

D60

SEG21

D61

D62

D63

SEG22

D64

D65

D66

SEG23

D67

D68

D69

SEG24

D70

D71

D72

SEG25

D73

D74

D75

SEG26

D76

D77

D78

SEG27

D79

D80

D81

SEG28

D82

D83

D84

SEG29

D85

D86

D87

SEG30

D88

D89

D90

SEG31

D91

D92

D93

SEG32

D94

D95

D96

SEG33

D100

D101

D102

SEG34

D103

D104

D105

SEG35

D106

D107

D108

SEG36

D109

D110

D111

SEG37

D112

D113

D114

SEG38

D115

D116

D117

SEG39

D118

D119

D120

SEG40

D121

D122

D123

SEG41

D124

D125

D126

SEG42

D97

D98

D99

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P r e l i m i n a r y

Output Pin

COM1

COM2

COM3

SEG43

D127

D128

D129

SEG44

D130

D131

D132

SEG45

D133

D134

D135

SEG46

D136

D137

D138

SEG47

D139

D140

D141

SEG48

D142

D143

D144

SEG49

D145

D146

D147

SEG50

D148

D149

D150

SEG51

D151

D152

D153

SEG52

D154

D155

D156

SEG53

D157

D158

D159

SEG54

D160

D161

D162

SEG55

D163

D164

D165

KS1 / S56

D166

D167

D168

KS2 / S57

D169

D170

D171

2) Control Registers

Bias Selection

1/3 Bias

Bias Selection Register

0
1

1/2 Bias

Key Scan / Segment output Selection Register

Port Mode Register

Maximum number of Input Pins

Control Data

Output Pin Status

KS1/SEG56 KS2/SEG57

KS1

KS2

SEG56

KS2

SEG56

SEG57

30
25
20

Control Data

Output Pin Status

SEG1/ P1

SEG2/ P2

SEG1

SEG2

SEG3/ P3

SEG4/ P4

SEG3

SEG4

SEG3

SEG4

HL15703

P r e l i m i n a r y

Sleep Mode Control Register

Port Data Register

Output Pin

SEG1 / P1
SEG2 / P2
SEG3 / P3
SEG4 / P4

Port Data Register

D1
D4
D7

D10

Control Data

Operating

Stopped
Stopped
Stopped

Normal

Sleep
Sleep
Sleep

Mode

OSC

Oscillator

Output Pin Status

KS1 KS2

KS3 KS4

KS5 KS6

Operating

L
L
L

SEG / COMMON

Output

Display On/Off Control Register

ADDRESS

Read Data

K1 ~ K30, SA

43H

Key Scan Data & Sleep Acknowledge Read

Control Data

0
1

Display Status

On
Off

SEG1 ~ SEG57

KS1 / SEG56
KS2 / SEG57
KS3
KS4
KS5
KS6

KIN1

K10

K11

K12

K13

K14

K15

K16

K17

K18

K19

K20

K21

K22

K23

K24

K25

K26

K27

K28

K29

K30

HL15703

P r e l i m i n a r y

8. Key Scan Function

1) Key Scan Timing

The key scan period is 384T. The HL15703 scans the key twice and determines
that a key has been pressed when the key data agrees. It outputs a key data read
request 800T after starting a key scan. If the key data does not agree and a key
was pressed at that point, it scans the key again.Thus the HL15703 cannot detect
a key press shorter than 800T.

800T

KS1

KS2

KS3

KS4

KS5

KS6

Key on

*) In sleep mode the high / low state of these pins is determined by the S0,S1 bits in the control data.
Key scan output signals are not output from pins that are set low.

2) In normal mode

· The pins KS1 to KS6 are set high.
· When a key is pressed a key scan is started and the keys are scanned until all
keys are released. Multiple key presses are recognized by determining whether
multiple key data bits are set.
· If a key is pressed for longer than 800T ( where T=1/fosc ) the HL15703
outputs a key data read request (a low level on SO pin) to the controller. The
controller acknowledges this request and reads the key data. However, if CE
is high during a serial data transfer, SO will be set high.
· After the controller reads the key data, the key data read requests is cleared (
SO pin is set high ) and the HL15703 performs another key scan. Also note
that SO pin, being an open-drain output, requires a pull-up resistor.

HL15703

P r e l i m i n a r y

Key input 1

3) In sleep mode

· The pins KS1 to KS6 are set to high or low by the S0 and S1 bits in the
sleep mode control register.
· If a key on one of the lines corresponding to a KS1 to KS6 pin which is set
high is pressed, the oscillator on the OSC pin is started and a key scan is
performed. Keys are scanned until all keys are released. Multiple key pre-
sses are recognized by determining whether multiple key data bits are set.
· If a key is pressed for longer than 800T ( where T=1/fosc ) the HL15703
outputs a key data read request (a low level on SO) to the controller. The
controller acknowledges this request and reads the key data. However, if
CE is high during a serial data transfer, SO will be set high.
· After the controller reads the key data, the key data read request is cleared
( SO is set high ) and the HL15703 performs another key scan. However
this does not clear sleep mode. Also note that SO, being an open-drain
output, requires a pull-up resistor ( between 1 and 10 K).
· Sleep mode key scan example
Example : S0 = 0, S1 = 1 ( sleep with only KS6 high )

Key input 2

Key Scan

800T

Key
address

Serial
data transfer

Key
address

Key data read request

Key data read

Key data read request

Serial
data transfer

HL15703

P r e l i m i n a r y

Key input
(KS6 line)

Key Scan

800T

Key
address

Key data read request

Key data read

Key data read request

"L" KS1
"L" KS2
"L" KS3
"L" KS4
"L" KS5
"H" KS6

KIN1
KIN2
KIN3
KIN4
KIN5

When any one of these keys is pressed, the
oscillator on the OSC pin is started and the keys
are scanned.

*) These diodes are required to reliable recognize multiple key presses on the KS6 line when sleep mode state with only
KS6 high, as in the above example. That is, these diodes prevent incorrect operation due to sneak currents in the KS6
key scan output signal when keys on the KS1 to KS5 lines are pressed at the same time.

Multiple Key Presses

Although the HL15703 is capable of key scanning without inserting diodes for
dual key presses, triple key presses on the KIN1 to KIN5 input pin lines, or mult-
iple key presses on the KS1 to KS6 output pin lines, multiple presses other than
these cases may result in keys that were not pressed recognized as having been
pressed. Therefore, a diode must be inserted in series with each key. Application
that do not recognize multiple key presses of threes or keys should check the key
data for three or more 1 bits and ignore such data.

Serial
data transfer

HL15703

P r e l i m i n a r y

9. LCD Display Function

COM1

1) 1/3 Duty 1/2 Bias Waveforms

VCL1,VCL2
0

VDD

VCL1,VCL2
0

VDD

COM2

VCL1,VCL2
0

VDD

COM3

VCL1,VCL2
0

VDD

LCD driver output when all
LCD segments corresponding
to COM1, COM2, and COM3
are turned off.

VCL1,VCL2
0

VDD

VCL1,VCL2
0

VDD

VCL1,VCL2
0

VDD

VCL1,VCL2
0

VDD

VCL1,VCL2
0

VDD

VCL1,VCL2
0

VDD

VCL1,VCL2
0

VDD

LCD driver output when all
LCD segments corresponding
to COM1 are on.

LCD driver output when all
LCD segments corresponding
to COM2 are on.

LCD driver output when all
LCD segments corresponding
to COM1 and COM2 are on.

LCD driver output when all
LCD segments corresponding
to COM3 are on.

LCD driver output when all
LCD segments corresponding
to COM1 and COM3 are on.

LCD driver output when all
LCD segments corresponding
to COM2 and COM3 are on.

LCD driver output when all
LCD segments corresponding
to COM1, COM2, and COM3
are on.

HL15703

P r e l i m i n a r y

COM1

2) 1/3 Duty 1/3 Bias Waveforms

COM2

COM3

VDD
VCL1
VCL2
0