This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility
for use of circuits described. No patent licenses are implied.
Rev.03 / Aug.01 Hynix Semiconductor
HY62SF16406D Series
256Kx16bit full CMOS SRAM
Document Title
256K x16 bit 1.7 ~ 2.3V Super Low Power FCMOS Slow SRAM
Revision History
Revision No History Draft Date Remark
00 Initial Draft Dec.20.2000 Preliminary
01 Changed Logo Mar.23.2001 Preliminary
02 Changed Isb1 values Jun.07.2001 Preliminary
03 Changed Package Size (6.1mm -> 6.0mm) Aug.07.2001 Preliminary
HY62SF16406D Series
Rev.03 / Aug.01
2
Preliminary
DESCRIPTION
The HY62SF16406D is a high speed, super low
power and 4Mbit full CMOS SRAM organized as
256K words by 16bits. The HY62SF16406D uses
high performance full CMOS process technology
and is designed for high speed and low power
circuit technology. It is particularly well-suited for
the high density low power system application.
This device has a data retention mode that
guarantees data to remain valid at a minimum
power supply voltage of 1.2V.
FEATURES
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup
-. 1.2V(min) data retention
Standard pin configuration
-. 48-ball FBGA
Standby
Current(uA)
Product No.
Voltage
(V)
Speed (ns)
Operation
Current/Icc(mA)
LL
SL
Temperature
(
C)
HY62SF16406D-I 1.7~2.3
70/85
3
12
6
-40~85
Note 1. I : Industrial
2. Current value is max.
PIN CONNECTION BLOCK DIAGRAM
PIN DESCRIPTION
Pin Name
Pin Function
Pin Name
Pin Function
/CS1, CS2 Chip Select
I/O1~I/O16
Data Inputs/Outputs
/WE
Write Enable
A0~A17
Address Inputs
/OE
Output Enable
Vcc
Power (1.7~2.3V)
/LB
Lower Byte Control (I/O1~I/O8) Vss
Ground
/UB
Upper Byte Control (I/O9~I/O16) NC
No Connection
MEMORY ARRAY
256K x 16
ROW
DECODER
SENSE AMP
WRITE DRIVER
DATA I/O
BUFFER
I/O1
I/O8
I/O9
I/O16
COLUMN
DECODER
BLOCK
DECODER
PRE DECODER
ADD I
NPUT
BUFFER
A17
/CS1
/OE
/LB
/UB
/WE
CS2
1
2
3
4
5
6
A
B
C
D
E
F
G
H
FBGA
/LB
IO9
IO10
/OE A0 A1 A2 CS2
/UB A3 A4 /CS1 IO1
IO11 A5 A6 IO2 IO3
Vss IO12 A17 A7 IO4 Vcc
Vcc IO13 NC A16 IO5 Vss
IO15 IO14 A14 A15 IO6 IO7
IO16 NC A12 A13 /WE IO8
NC A8 A9 A10 A11 NC
HY62SF16406D Series
Rev.03 / Aug.01
2
ORDERING INFORMATION
Part No.
Speed
Power
Temp
.
Package
HY62SF16406D-DF(I)
70/85
LL-part
I
FBGA
HY62SF16406D-SF(I)
70/85
SL-part
I
FBGA
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
Parameter
Rating
Unit
Remark
V
IN,
V
OUT
Input/Output Voltage
-0.3 to 2.6
V
Vcc
Power Supply
-0.3 to 3.6
V
T
A
Operating Temperature
-40 to 85
C
HY62SF16406D-I
T
STG
Storage Temperature
-55 to 150
C
P
D
Power Dissipation
1.0
W
T
SOLDER
Ball Soldering Temperature & Time
260
10
C
sec
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
I/O Pin
/CS1 CS2 /WE /OE /LB /UB
Mode
I/O1~I/O8
I/O9~I/O16
Power
H
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
H
H
Deselected
Hi-Z
Hi-Z
Standby
L
X
L
H
H
H
X
L
Output Disabled
Hi-Z
Hi-Z
Active
L
H
D
OUT
Hi-Z
H
L
Hi-Z
D
OUT
L
H
H
L
L
L
Read
D
OUT
D
OUT
Active
L
H
D
IN
Hi-Z
H
L
Hi-Z
D
IN
L
H
L
X
L
L
Write
D
IN
D
IN
Active
Note:
1. H=V
IH
, L=V
IL
, X=don't care (V
IL or
V
IH
)
2. /UB, /LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When /LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8.
When /UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16.
HY62SF16406D Series
Rev.03 / Aug.01
3
RECOMMENDED DC OPERATING CONDITION
Symbol
Parameter
Min.
Typ
Max.
Unit
Vcc
Supply Voltage
1.7
1.8
2.3
V
Vss
Ground
0
0
0
V
V
IH
Input High Voltage
1.4
-
Vcc+0.3
V
V
IL
Input Low Voltage
-0.3
1.
-
0.4
V
Note : 1. Undershoot : VIL = -1.5V for pulse width less than 30ns
2. Undershoot is sampled, not 100% tested.
DC ELECTRICAL CHARACTERISTICS
T
A
= -40
C to 85
C
Sym
Parameter
Test Condition
Min Typ
1.
Max Unit
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
-1
-
1
uA
I
LO
Output Leakage Current
Vss < V
OUT
< Vcc,
/CS1 = V
IH
or CS2=V
IL
or
/
OE
=
V
IH
or /WE = V
IL
or
/
UB
=
V
IH ,
/LB = V
IH
-1
-
1
uA
Icc
Operating Power Supply Current
/CS1 = V
IL
, CS2=V
IH
,
V
IN
= V
IH
or V
IL,
I
I/O =
0mA
3
mA
/CS1 = V
IL,
CS2 = V
IH
,
V
IN
= V
IH
or V
IL,
Cycle Time = Min,
100% Duty, I
I/O =
0mA
20
mA
I
CC1
Average Operating Current
/CS1 < 0.2V
,
CS2 > Vcc-0.2V,
V
IN
< 0.2V or V
IN
> Vcc-0.2V
,
Cycle Time = 1us,
100% Duty, I
I/O =
0mA
3
mA
I
SB
Standby Current
(TTL Input)
/CS1 = V
IH
or CS2 = V
IL
or
/UB, /LB = V
IH
V
IN
= V
IH
or V
IL
0.3
mA
SL
0.2
6
uA
I
SB1
Standby Current
(CMOS Input)
/CS1 > Vcc - 0.2V or
CS2 < Vss + 0.2V or
/UB, /LB > Vcc - 0.2V
V
IN
> Vcc - 0.2V or
V
IN
< Vss + 0.2V
LL
0.2
12
uA
V
OL
Output Low
I
OL
= 0.1mA
-
-
0.2
V
V
OH
Output High
I
OH =
-0.1mA
1.6
-
-
V
Note
1. Typical values are at Vcc = 1.8V T
A
= 25
C
2. Typical values are not 100% tested
CAPACITANCE
(Temp = 25
C, f= 1.0MHz)
Symbol
Parameter
Condition
Max.
Unit
C
IN
Input Capacitance (Add, /CS1,CS2,/LB,/UB, /WE, /OE)
V
IN
= 0V
8
pF
C
OUT
Output Capacitance (I/O)
V
I/O
= 0V
10
pF
Note : These parameters are sampled and not 100% tested
HY62SF16406D Series
Rev.03 / Aug.01
4
AC CHARACTERISTICS
T
A
= -40
C to 85
C, unless otherwise specified
70ns
85ns
# Symbol
Parameter
Min. Max. Min. Max.
Unit
1 tRC
Read Cycle Time
70
-
85
-
ns
2 tAA
Address Access Time
-
70
-
85
ns
3 tACS
Chip Select Access Time
-
70
-
85
ns
4 tOE
Output Enable to Output Valid
-
35
-
40
ns
5 tBA
/LB, /UB Access Time
-
70
-
85
ns
6 tCLZ
Chip Select to Output in Low Z
10
-
10
-
ns
7 tOLZ
Output Enable to Output in Low Z
5
-
5
-
ns
8 tBLZ
/LB, /UB Enable to Output in Low Z
10
-
10
-
ns
9 tCHZ
Chip Deselection to Output in High Z
0
30
0
30
ns
10 tOHZ
Out Disable to Output in High Z
0
30
0
30
ns
11 tBHZ
/LB, /UB Disable to Output in High Z
0
30
0
30
ns
12 tOH
Output Hold from Address Change
10
-
10
-
ns
13 tWC
Write Cycle Time
70
-
85
-
ns
14 tCW
Chip Selection to End of Write
60
-
70
-
ns
15 tAW
Address Valid to End of Write
60
-
70
-
ns
16 tBW
/LB, /UB Valid to End of Write
60
-
70
-
ns
17 tAS
Address Set-up Time
0
-
0
-
ns
18 tWP
Write Pulse Width
50
-
60
-
ns
19 tWR
Write Recovery Time
0
-
0
-
ns
20 tWHZ
Write to Output in High Z
0
20
0
25
ns
21 tDW
Data to Write Time Overlap
30
-
35
-
ns
22 tDH
Data Hold from Write Time
0
-
0
-
ns
23 tOW
Output Active from End of Write
5
-
5
-
ns
AC TEST CONDITIONS
T
A
= -40
C to 85
C, unless otherwise specified
Parameter
Value
Input Pulse Level
0.4V to 1.6V
Input Rise and Fall Time
5ns
Input and Output Timing Reference Level
0.9V
tCLZ, tOLZ, tBLZ, tCHZ, tOHZ, tBHZ, tWHZ, tOW
CL = 5pF + 1TTL Load
Output Load
Others
CL = 30pF + 1TTL Load
AC TEST LOADS
D
OUT
3273 Ohm
CL(1)
4091 Ohm
V
TM
=1.8V
Note 1. Including jig and scope capacitance:
READ CYCLE
WRITE CYCLE
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