This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility
for use of circuits described. No patent licenses are implied.
Rev 02 / Apr. 2001 Hynix Semiconductor

HY62K(U,V)T08081E

Series

32Kx8bit CMOS SRAM

Document Title

32K x8 bit 2.7~3.3V / 3.0~3.6V / 2.7~3.6V Low Power Slow SRAM

Revision History

Revision No History Draft Date Remark

00 Initial Jan.20.2000 Final
Merged 3.0V/3.3V SPEC

01 Revised Feb.21.2001 Final

Marking Information Change : SOP Type

Voh Limit Change : 2.4V => 2.2V @2.7~3.6V

02 Changed Logo Apr.30.2001 Final

- HYUNDAI -> hynix
- Marking Information Change

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

DESCRIPTION

The HY62K(U,V)T08081E is a high-speed, low
power and 32,786 X 8-bits CMOS Static Random
Access Memory fabricated using Hynix's high
performance CMOS process technology. It is
suitable for use in low voltage operation and
battery back-up application. This device has a
data retention mode that guarantees data to
remain valid at the minimum power supply
voltage of 2.0 volt.

FEATURES

Fully static operation and Tri-state output

TTL compatible inputs and outputs

Low power consumption

Battery backup(L/LL-part)

- 2.0V(min.) data retention

Standard pin configuration

- 28 pin 600mil PDIP

- 28 pin 330mil SOP
- 28 pin 8x13.4 mm TSOP-I
(Standard)

Product

Voltage

Speed

Operation

Standby Current(uA)

Temperature

No.

(V)

(ns)

Current(mA)

LL-Part

(

HY62KT08081E-C

0~70(Normal)

HY62KT08081E-E

-25~85(Extended)

HY62KT08081E-I

2.7~3.6 70*/85/100

-40~85(Extended)

HY62VT08081E-C

0~70(Normal)

HY62VT08081E-E

-25~85(Extended)

HY62VT08081E-I

3.0~3.6 70/85/100

-40~85(Extended)

HY62UT08081E-C

0~70(Normal)

HY62UT08081E-E

-25~85(Extended)

HY62UT08081E-I

2.7~3.3 70*/85/100

-40~85(Extended)

Note *. Measured at 30pF test load.

PIN CONNECTION

Vcc
/WE

A11

/OE

A10

/CS

I/O8

I/O7

I/O6

I/O5

I/O4

A14

A12

I/O1

I/O2

I/O3

Vss

A13

Vcc

/WE

A11

/OE

A10

/CS

I/O8

I/O7

I/O6

I/O5

I/O4

A14

A12

I/O1

I/O2

I/O3

Vss

A13

A10

/CS

I/O7

I/O6

I/O5

I/O4

Vss

I/O3

I/O2

I/O1

/OE

A11

A13

/WE

Vcc

A14

A12

I/O8

PDIP SOP TSOP-I(Standard)

PIN DESCRIPTION BLOCK DIAGRAM

Pin Name

Pin Function

/CS

Chip Select

/WE

Write Enable

/OE

Output Enable

A0 ~ A14

Address Inputs

I/O1 ~ I/O8

Data Input/Output

Vcc

Power(

5.0V)

Vss

Ground

A14

COLUMN DECODER

ROW DECODER

MEMORY ARRAY

512x512

SENSE AMP

OUTPUT BUFFER

I/O1

I/O8

ADD INPUT BUFFER

/CS

/OE

/WE

WRITE DRIVER

CONTROL

LOGIC

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

ORDERING INFORMATION

Part No.

Vcc

Speed

Power

Temp

Package

HY62KT08081E-DPC

0 to 70

HY62KT08081E-DPE

-25 to 85

HY62KT08081E-DPI

-40 to 85

PDIP

HY62KT08081E-DGC

0 to 70

HY62KT08081E-DGE

-25 to 85

HY62KT08081E-DGI

-40 to 85

SOP

HY62KT08081E-DTC

0 to 70

HY62KT08081E-DTE

-25 to 85

HY62KT08081E-DTI

2.7~3.6V 70*/85/100ns LL-part

-40 to 85

TSOP-I Standard

HY62VT08081E-DPC

0 to 70

HY62VT08081E-DPE

-25 to 85

HY62VT08081E-DPI

-40 to 85

PDIP

HY62VT08081E-DGC

0 to 70

HY62VT08081E-DGE

-25 to 85

HY62VT08081E-DGI

-40 to 85

SOP

HY62VT08081E-DTC

0 to 70

HY62VT08081E-DTE

-25 to 85

HY62VT08081E-DTI

3.0~3.6V

70/85/100ns LL-part

-40 to 85

TSOP-I Standard

HY62UT08081E-DPC

0 to 70

HY62UT08081E-DPE

-25 to 85

HY62UT08081E-DPI

-40 to 85

PDIP

HY62UT08081E-DGC

0 to 70

HY62UT08081E-DGE

-25 to 85

HY62UT08081E-DGI

-40 to 85

SOP

HY62UT08081E-DTC

0 to 70

HY62UT08081E-DTE

-25 to 85

HY62UT08081E-DTI

2.7~3.3V 70*/85/100ns LL-part

-40 to 85

TSOP-I Standard

Note *. Measured at 30pF test load.

ABSOLUTE MAXIMUM RATING (1)

Symbol

Parameter

Rating

Unit

Vcc, V

IN,

OUT

Power Supply, Input/Output Voltage

-0.3 to 4.6

HY62K(U,V)T08081E-C

0 to 70

HY62K(U,V)T08081E-E

-25 to 85

Operating Temperature

HY62K(U,V)T08081E-I

-40 to 85

STG

Storage Temperature

-65 to 150

Power Dissipation

1.0

OUT

Data Output Current

SOLDER

Lead Soldering Temperature & Time

260

sec

Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

RECOMMENDED DC OPERATING CONDITIONS

Symbol

Parameter

Min.

Typ.

Max.

Unit

HY62KT08081E

2.7

3.0/3.3

3.6

HY62VT08081E

3.0

3.3

3.6

Vcc

Power Supply
Voltage

HY62UT08081E

2.7

3.0

3.3

Vss

Ground

Input High Voltage

2.2

Vcc+0.3

Input Low Voltage

-0.3

(1)

0.4

Note
1. V

= -1.5V for pulse width less than 50ns

TRUTH TABLE

/CS /WE /OE

Mode

I/O Operation

X Standby

High-Z

H Output Disabled High-Z

L Read

Data Out

X Write

Data In

Note
1. H=V

, L=V

, X=Don't Care

DC CHARACTERISTICS

Vcc = 2.7~3.6V, T

= 0

to 70

C (Normal)/-25

C to 85

C (Extended) /-40

C to 85

C (Industrial),

unless otherwise specified.
Symbol

Parameter

Test Condition

Min. Typ. Max. Unit

Input Leakage Current

Vss < V

< Vcc

-1

Output Leakage Current

Vss < V

OUT

< Vcc, /CS = V

or /WE = V

-1

Icc

Operating Power Supply
Current

/CS = V

= V

or V

IL,

I/O =

0mA

CC1

Average Operating Current /CS = V

IL,

= V

or V

IL,

Min. Duty Cycle = 100%, I

I/O =

0mA

CC2

Average Operating Current /CS = V

IL,

= V

or V

Cycle = 1us , I

I/O =

0mA

TTL Standby Current
(TTL Inputs)

/CS= V

IH,

= V

or V

0.3

SB1

CMOS Standby Current

/CS > Vcc - 0.2V,

0~70

(CMOS Inputs)

> Vcc - 0.2V or

< Vss + 0.2V

-25~85

C or

-40~85

Output Low Voltage

= 2.1mA

0.4

Output High Voltage

OH =

-1.0mA

2.2

Note : Typical values are at Vcc =3.0/3.3V, T

= 25

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

AC CHARACTERISTICS

Vcc = 2.7~3.6V , T

= 0

to 70

(Normal)/-25

C to 85

C (Extended) /-40

C to 85

C (Industrial),

unless otherwise specified.

-70

-85

-10

Min. Max. Min. Max. Min

Max.

1 tRC

Read Cycle Time

100

2 tAA

Address Access Time

100

3 tACS

Chip Select Access Time

100

4 tOE

Output Enable to Output Valid

5 tCLZ

Chip Select to Output in Low Z

6 tOLZ

Output Enable to Output in Low Z

7 tCHZ

Chip Deselection to Output in High Z

8 tOHZ

Out Disable to Output in High Z

9 tOH

Output Hold from Address Change

10 tWC

Write Cycle Time

100

11 tCW

Chip Selection to End of Write

12 tAW

Address Valid to End of Write

13 tAS

Address Set-up Time

14 tWP

Write Pulse Width

15 tWR

Write Recovery Time

16 tWHZ Write to Output in High Z

17 tDW

Data to Write Time Overlap

18 tDH

Data Hold from Write Time

19 tOW

Output Active from End of Write

READ CYCLE

WRITE CYCLE

Symbol

Parameter

Unit

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

AC TEST CONDITIONS

Vcc = 2.7~3.6V, T

= 0

to 70

(Normal)/-25

C to 85

C (Extended) /-40

C to 85

C (Industrial),

unless otherwise specified.

Parameter

Value

Input Pulse Level

0.4V to 2.2V

Input Rise and Fall Time

5ns

Input and Output Timing Reference Level

1.5V

Output Load

tCLZ,tOLZ,tCHZ,tOHZ,tWHZ,tOW

CL = 5pF + 1TTL Load

Others

CL = 100pF + 1TTL Load

CL* = 30pF + 1TTL Load

AC TEST LOADS

CL(1)

TTL

Note : Including jig and scope capacitance

CAPACITANCE

= 25

C, f = 1.0MHz

Symbol

Parameter

Condition

Max.

Unit

Input Capacitance

= 0V

I/O

Input /Output Capacitance

I/O

= 0V

Note : These parameters are sampled and not 100% tested

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

TIMING DIAGRAM

READ CYCLE 1

ADDR

Data
Out

Data Valid

tRC

tACS

tCLZ

tOE

tOLZ

tAA

tOH

tOHZ

tCHZ

High-Z

Note(READ CYCLE):

1. t

CHZ

and t

OHZ

are defined as the time at which the outputs achieve the open circuit conditions and arenot

referenced to output voltage levels.
2. At any given temperature and voltage condition, t

CHZ

max. is less than t

CLZ

min. both for a given device

and from device to device.
3. /WE is high for the read cycle.

READ CYCLE 2

tRC

tAA

Data Valid

Previous Data

tOH

ADDR

Data
Out

Note(READ CYCLE):
1. /WE is high for the read cycle.
2. Device is continuously selected /CS= V

IL.

3. /OE =V

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

Notes(WRITE CYCLE):
1. A write occurs during the overlap of a low /CS and a low /WE. A write begins at the latest transition

among /CS going low and /WE going low: A write ends at the earliest transition among /CS going high
and /WE going high. t

is measured from the beginning of write to the end of write.

2. t

is measured from the later of /CS going low to the end of write .

3. t

is measured from the address valid to the beginning of write.

4. t

is measured from the end of write to the address change. t

WR is

applied in case a write ends as /CS,

or /WE going high.
5. If /OE and /WE are in the read mode during this period, and the I/O pins are in the output low-Z state,

input of opposite phase of the output must not be applied because bus contention can occur.

6. If /CS goes low simultaneously with /WE going low, or after /WE going low, the outputs remain in high

impedance state.

7. D

OUT

is the same phase of the latest written data in this write cycle.

8. D

OUT

is the read data of the new address.

DATA RETENTION CHARACTERISTIC

Vcc = 2.7~3.6V, T

= 0

C to 70

C (Normal)/-25

C to 85

C (Extended) /-40

C to 85

C (Industrial),

unless otherwise specified.
Symbol

Parameter

Test Condition

Min

Typ Max Unit

Vcc for Data Retention

CS>Vcc-0.2V,

2.0

3.6

>Vcc-0.2V or V

<Vss+0.2V

CCDR

Data Retention Current

Vcc=3.0V,

/CS>Vcc - 0.2V,

0~70

0.5

>Vcc - 0.2V or

<Vss + 0.2V

-25~85

C or

-40~85

0.5

tCDR

Chip Deselect to Data
Retention Time

See Data Retention

Operating Recovery Time

Timing Diagram

tRC

(2)

Notes
1. Typical values are under the condition of T

= 25

2. tRC is read cycle time.

DATA RETENTION TIMING DIAGRAM

VDR

CS>VCC-0.2V

tCDR

VSS

VCC

2.7V/3.0V

2.2V

DATA RETENTION MODE

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

PACKAGE INFORMATION

28pin 600mil Dual In-Line Package(Blank)

UNIT : INCH(mm)

MIN.

MAX.

1.467(37.262)

1.447(36.754)

0.140(3.556)

0.120(3.048)

0.155(3.937)

0.145(3.683)

0.020(0.508)

0.021(0.533)

0.015(0.381)

0.100(2.54)BSC

0.065(1.650)

0.050(1.270)

0.090(2.286)

0.070(1.778)

0.014(0.356)

0.008(0.200)

0.600(15.240)BSC

0.550(13.970)

0.530(13.462)

0.035(0.889)

3 deg
11 deg

28pin 330mil Small O utline Package(FW)

UNIT : INCH(mm)

0.346(8.788)

0.338(8.585)

0.480(12.192)

0.460(11.684)

0.110(2.794)

0.094(2.388)

0.014(0.356)

0.002(0.051)

0.050(1.270)BSC

0.020(0.508)

0.014(0.356)

0.728(18.491)

0.720(18.288)

0.012(0.305)

0.008(0.203)

0.050(1.270)

0.030(0.762)

MAX
.
MIN.

HY62K(U,V)T08081E Series

Rev 02 / Apr. 2001

MARKING INFORMATION

PDIP

SOP

Package

Marking Example

Index

· hynix

: hynix Logo

· KOREA

: Origin Country

· HY62vT081E

: Part Name

- HY62KT081E

: 2.7~3.6V

- HY62VT081E

: 3.0~3.6V

- HY62UT081E

: 2.7~3.3V

· yy

: Year ( ex : 00 = year 2000, 01 = year 2001 )

· ww

: Work Week ( ex : 12 = ww12 )

· p

: Process Code

· c

: Power Consumption

- L

: Low Power

- D

: Low Low Power

· ss

: Speed

- 70

: 70ns

- 85

: 85ns

· t

: Temperature

- C

: Commercial ( 0 ~ 70

C )

- E

: Extended ( -25 ~ 85

C )

- I

: Industrial ( -40 ~ 85

C )

· xxxxxxxx

: Lot Number

Note

- Capital Letter

: Fixed Item

- Small Letter

: Non-fixed Item ( Except hynix )

TSOP-I

PDIP

SOP

Package

Marking Example

Index

· hynix

: hynix Logo

· KOREA

: Origin Country

· HY62vT081E

: Part Name

- HY62KT081E

: 2.7~3.6V

- HY62VT081E

: 3.0~3.6V

- HY62UT081E

: 2.7~3.3V

· yy

: Year ( ex : 00 = year 2000, 01 = year 2001 )

· ww

: Work Week ( ex : 12 = ww12 )

· p

: Process Code

· c

: Power Consumption

- L

: Low Power

- D

: Low Low Power

· ss

: Speed

- 70

: 70ns

- 85

: 85ns

· t

: Temperature

- C

: Commercial ( 0 ~ 70

C )

- E

: Extended ( -25 ~ 85

C )

- I

: Industrial ( -40 ~ 85

C )

· xxxxxxxx

: Lot Number

Note

- Capital Letter

: Fixed Item

- Small Letter

: Non-fixed Item ( Except hynix )

TSOP-I

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ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HY62VT08081E-DGI