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Электронный компонент: IC61LV6416-15TI

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IC61LV6416
Integrated Circuit Solution Inc.
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AHSR026-0A
09/12/2001
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Document Title
64K x 16 Hight Speed SRAM with 3.3V
Revision History
Revision No
History
Draft Date
Remark
0A
Initial Draft
September 12,2001
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
IC61LV6416
2
Integrated Circuit Solution Inc.
AHSR026-0A
09/12/2001
FEATURES
High-speed access time: 8, 10, 12, and 15 ns
CMOS low power operation
-- 250 mW (typical) operating
-- 250 W (typical) standby
TTL compatible interface levels
Single 3.3V power supply
Fully static operation: no clock or refresh
required
Three state outputs
Data control for upper and lower bytes
Industrial temperature available
64K x 16 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY
DESCRIPTION
The
ICSI
IC61LV6416 is a high-speed, 1,048,576-bit static
RAM organized as 65,536 words by 16 bits. It is fabricated
using
ICSI
's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields access times as fast as 8 ns with low power
consumption.
When
CE
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs,
CE
and
OE
. The active LOW Write
Enable (
WE
) controls both writing and reading of the memory.
A data byte allows Upper Byte (
UB
) and Lower Byte (
LB
)
access.
The IC61LV6416 is packaged in the JEDEC standard 44-pin
400mil SOJ, 44-pin 400mil TSOP-2, and 48-pin 6*8mm TF-
BGA.
FUNCTIONAL BLOCK DIAGRAM
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. Copyright 2000, Integrated Circuit Solution Inc.
A0-A15
CE
OE
WE
64K x 16
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
UB
LB
IC61LV6416
Integrated Circuit Solution Inc.
3
AHSR026-0A
09/12/2001
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PIN CONFIGURATIONS
44-Pin SOJ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A15
A14
A13
A12
A11
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
A8
A7
NC
A0
A1
A2
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A3
A4
A5
A6
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A15
A14
A13
A12
A11
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
A8
A7
NC
A0
A1
A2
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A3
A4
A5
A6
NC
44-Pin TSOP-2
48-Pin 6x8mm TF-BGA
PIN DESCRIPTIONS
A0-A15
Address Inputs
I/O0-I/O15
Data Inputs/Outputs
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
LB
Lower-byte Control (I/O0-I/O7)
UB
Upper-byte Control (I/O8-I/O15)
NC
No Connection
Vcc
Power
GND
Ground
TRUTH TABLE
I/O PIN
Mode
WE
WE
WE
WE
WE
CE
CE
CE
CE
CE
OE
OE
OE
OE
OE
LB
LB
LB
LB
LB
UB
UB
UB
UB
UB
I/O0-I/O7
I/O8-I/O15
Vcc Current
Not Selected
X
H
X
X
X
High-Z
High-Z
I
SB
1
, I
SB
2
Output Disabled
H
L
H
X
X
High-Z
High-Z
I
CC
X
L
X
H
H
High-Z
High-Z
Read
H
L
L
L
H
D
OUT
High-Z
I
CC
H
L
L
H
L
High-Z
D
OUT
H
L
L
L
L
D
OUT
D
OUT
Write
L
L
X
L
H
D
IN
High-Z
I
CC
L
L
X
H
L
High-Z
D
IN
L
L
X
L
L
D
IN
D
IN
1 2 3 4 5 6
A
B
C
D
E
F
G
H
LB
OE
A3
A7
A6
N/C
I/O
0
UB
A2
A1
CE
I/O
15
I/O
1
I/O
2
A0
A4
I/O
13
I/O
14
GND
I/O
3
NC
A5
I/O
12
Vcc
Vcc
I/O
4
NC
NC
I/O
11
GND
I/O
5
I/O
6
A9
A8
I/O
10
I/O
9
I/O
7
NC
A11
A10
WE
I/O
8
NC
A12
A13
A14
A15
NC
IC61LV6416
4
Integrated Circuit Solution Inc.
AHSR026-0A
09/12/2001
OPERATING RANGE
Range
Ambient Temperature
Vcc
Commercial
0C to +70C
3.3V 10%
Industrial
40C to +85C
3.3V 10%
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-8 ns
-10 ns
-12 ns
-15 ns
Symbol
Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Min. Max. Unit
I
CC
Vcc Dynamic Operating
V
CC
= Max.,
Com.
--
220
--
200
--
180
--
180
mA
Supply Current
I
OUT
= 0 mA, f = f
MAX
Ind.
--
230
--
210
--
190
--
190
I
SB
1
TTL Standby Current
V
CC
= Max.,
Com.
--
30
--
30
--
30
--
30
mA
(TTL Inputs)
V
IN
= V
IH
or V
IL
Ind.
--
40
--
40
--
40
--
40
CE
V
IH
, f = 0
I
SB
2
CMOS Standby
V
CC
= Max.,
Com.
--
10
--
10
--
10
--
10
mA
Current (CMOS Inputs)
CE
V
CC
0.2V,
Ind.
--
15
--
15
--
15
--
15
V
IN
V
CC
0.2V, or
V
IN
0.2V, f = 0
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
= 4.0 mA
2.4
--
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 8.0 mA
--
0.4
V
V
IH
Input HIGH Voltage
2
V
CC
+ 0.3
V
V
IL
Input LOW Voltage
(1)
0.3
0.8
V
I
LI
Input Leakage
GND
V
IN
V
CC
Com.
2
2
A
Ind.
-5
5
I
LO
Output Leakage
GND
V
OUT
V
CC
, Outputs Disabled
Com.
2
2
A
Ind.
-5
5
Notes:
1. V
IL
(min.) = 2.0V for pulse width less than 10 ns.
2. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to Vcc+0.5
V
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
1.5
W
I
OUT
DC Output Current (LOW)
20
mA
Note:
1. Stress greater than those listed under
ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the
device. This is a stress rating only and
functional operation of the device at
these or any other conditions above
those indicated in the operational sec-
tions of this specification is not implied.
Exposure to absolute maximum rating
conditions for extended periods may
affect reliability.
IC61LV6416
Integrated Circuit Solution Inc.
5
AHSR026-0A
09/12/2001
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2
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10
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READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-8
-10
-12
-15
Symbol Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
8
--
10
--
12
--
15
--
ns
t
AA
Address Access Time
--
8
--
10
--
12
--
15
ns
t
OHA
Output Hold Time
3
--
3
--
3
--
3
--
ns
t
ACE
CE
Access Time
--
8
--
10
--
12
--
15
ns
t
DOE
OE
Access Time
--
4
--
5
--
6
--
7
ns
t
HZOE
(2)
OE
to High-Z Output
0
4
--
5
--
6
0
6
ns
t
LZOE
(2)
OE
to Low-Z Output
0
--
0
--
0
--
0
--
ns
t
HZCE
(2
CE
to High-Z Output
0
4
0
5
0
6
0
6
ns
t
LZCE
(2)
CE
to Low-Z Output
3
--
3
--
3
--
3
--
ns
t
BA
LB
,
UB
Access Time
--
4
--
5
--
6
--
7
ns
t
HZB
LB
,
UB
to High-Z Output
0
4
0
5
0
6
0
6
ns
t
LZB
LB
,
UB
to Low-Z Output
0
--
0
--
0
--
0
--
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
3 ns
Input and Output Timing
1.5V
and Reference Level
Output Load
See Figures 1a and 1b
Notes:
1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
CAPACITANCE
(1)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Input/Output Capacitance
V
OUT
= 0V
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
AC TEST LOADS
Figure 1a.
Figure 1b.
319
30 pF
Including
jig and
scope
353
OUTPUT
3.3V
319
5 pF
Including
jig and
scope
353
OUTPUT
3.3V
IC61LV6416
6
Integrated Circuit Solution Inc.
AHSR026-0A
09/12/2001
DATA VALID
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACE
t
LZCE
t
HZOE
HIGH-Z
DATA VALID
t
HZB
ADDRESS
OE
CE
LB, UB
D
OUT
t
HZCE
t
BA
t
LZB
READ CYCLE NO. 2
(1,3)
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
(Address Controlled) (
CS
=
OE
= V
IL
,
UB
or
LB
= V
IL
)
Notes:
1.
WE
is HIGH for a Read Cycle.
2. The device is continuously selected.
OE
,
CE
,
UB
, or
LB
= V
IL
.
3. Address is valid prior to or coincident with
CE
LOW transition.
IC61LV6416
Integrated Circuit Solution Inc.
7
AHSR026-0A
09/12/2001
1
2
3
4
5
6
7
8
9
10
11
12
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,3)
(Over Operating Range)
-8
-10
-12
-15
Symbol Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
WC
Write Cycle Time
8
--
10
--
12
--
15
--
ns
t
SCE
CE
to Write End
7
--
8
--
9
--
10
--
ns
t
AW
Address Setup Time
7
--
8
--
9
--
10
--
ns
to Write End
t
HA
Address Hold from Write End
0
--
0
--
0
--
0
--
ns
t
SA
Address Setup Time
0
--
0
--
0
--
0
--
ns
t
PWB
LB
,
UB
Valid to End of Write
7
--
8
--
9
--
10
--
ns
t
PWE
WE
Pulse Width
7
--
8
--
9
--
10
--
ns
t
SD
Data Setup to Write End
4.5
--
5
--
6
--
7
--
ns
t
HD
Data Hold from Write End
0
--
0
--
0
--
0
--
ns
t
HZWE
(2)
WE
LOW to High-Z Output
--
4
--
5
--
6
--
7
ns
t
LZWE
(2)
WE
HIGH to Low-Z Output
3
--
3
--
3
--
3
--
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of
CE
LOW and
UB
or
LB
, and
WE
LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
IC61LV6416
8
Integrated Circuit Solution Inc.
AHSR026-0A
09/12/2001
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the
CE
and
WE
inputs and at least
one of the
LB
and
UB
inputs being in the LOW state.
2. WRITE = (
CE
)
[
(
LB
) = (
UB
)
]
(
WE
).
AC WAVEFORMS
WRITE CYCLE NO. 1 (
WE
WE
WE
WE
WE Controlled)
(1,2)
UNDEFINED
UNDEFINED
t
WC
t
SCE
t
PWB
t
AW
t
HA
HIGH-Z
HIGH-Z
t
PWE
t
HD
t
SA
t
HZWE
ADDRESS
CE
LB, UB
WE
WRITE
(1)
D
OUT
D
IN
t
LZWE
t
SD
IC61LV6416
Integrated Circuit Solution Inc.
9
AHSR026-0A
09/12/2001
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ORDERING INFORMATION
Commercial Range: 0C to +70C
Speed (ns)
Order Part No.
Package
8
IC61LV6416-8B
6*8mm TF-BGA
8
IC61LV6416-8T
400mil TSOP-2
8
IC61LV6416-8K
400mil SOJ
10
IC61LV6416-10B
6*8mm TF-BGA
10
IC61LV6416-10T
400mil TSOP-2
10
IC61LV6416-10K
400mil SOJ
12
IC61LV6416-12B
6*8mm TF-BGA
12
IC61LV6416-12T
400mil TSOP-2
12
IC61LV6416-12K
400mil SOJ
15
IC61LV6416-15B
6*8mm TF-BGA
15
IC61LV6416-15T
400mil TSOP-2
15
IC61LV6416-15K
400mil SOJ
ORDERING INFORMATION
Industrial Range: 40C to +85C
Speed (ns)
Order Part No.
Package
8
IC61LV6416-8BI
6*8mm TF-BGA
8
IC61LV6416-8TI
400mil TSOP-2
8
IC61LV6416-8KI
400mil SOJ
10
IC61LV6416-10BI
6*8mm TF-BGA
10
IC61LV6416-10TI
400mil TSOP-2
10
IC61LV6416-10KI
400mil SOJ
12
IC61LV6416-12BI
6*8mm TF-BGA
12
IC61LV6416-12TI
400mil TSOP-2
12
IC61LV6416-12KI
400mil SOJ
15
IC61LV6416-15BI
6*8mm TF-BGA
15
IC61LV6416-15TI
400mil TSOP-2
15
IC61LV6416-15KI
400mil SOJ
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5
TH
ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw