ChipFind - документация

Электронный компонент: IC62LV256-70UI

Скачать:  PDF   ZIP
IC62LV256
Integrated Circuit Solution Inc.
1
ALSR007-0A 10/5/2001
Document Title
32K x 8 Low Power SRAM with 3.3V
Revision History
Revision No
History
Draft Date
Remark
0A
Initial Draft
October 5,2001
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
IC62LV256
2
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. Copyright 2000, Integrated Circuit Solution Inc.
FEATURES
Access time: 45, 70, 100 ns
Low active power: 70 mW
Low standby power
-- 60 W CMOS standby
Fully static operation: no clock or refresh
required
TTL compatible inputs and outputs
Single 3.3V power supply
DESCRIPTION
The
ICSI
IC62LV256 is a low power, 32, 768-word by 8-bit
static RAM. It is fabricated using
ICSI
's high-performance
CMOS double-metal technology.
When
CE
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation is reduced to
20 W (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (
CE
) input and an active LOW Output Enable (
OE
)
input. The active LOW Write Enable (
WE
) controls both writing
and reading of the memory.
The IC62LV256 is pin compatible with other 32K x 8 SRAMs
in 300mil DIP and SOJ, 330mil SOP, and 8*13.4mm TSOP-1
packages.
32K x 8 LOW VOLTAGE STATIC RAM
FUNCTIONAL BLOCK DIAGRAM
A0-A14
CE
OE
WE
256 X 1024
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
IC62LV256
Integrated Circuit Solution Inc.
3
ALSR007-0A 10/5/2001
PIN CONFIGURATION
28-Pin DIP, SOJ and SOP
PIN CONFIGURATION
8x13.4mm TSOP-1
PIN DESCRIPTIONS
A0-A14
Address Inputs
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Input/Output
Vcc
Power
GND
Ground
TRUTH TABLE
Mode
WE
WE
WE
WE
WE
CE
CE
CE
CE
CE
OE
OE
OE
OE
OE
I/O Operation
Vcc Current
Not Selected
X
H
X
High-Z
I
SB
1
, I
SB
2
(Power-down)
Output Disabled
H
L
H
High-Z
I
CC
1
, I
CC
2
Read
H
L
L
D
OUT
I
CC
1
, I
CC
2
Write
L
L
X
D
IN
I
CC
1
, I
CC
2
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to +4.6
V
T
BIAS
Temperature Under Bias
55 to +125
C
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
0.5
W
I
OUT
DC Output Current (LOW)
20
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
IC62LV256
4
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
OPERATING RANGE
Range
Ambient Temperature
V
CC
Commercial
0C to +70C
3.3V
5%
Industrial
40C to +85C
3.3V
5%
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-45 ns
-70 ns
-100 ns
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Unit
I
CC
1
Vcc Operating
V
CC
= Max.,
CE
= V
IL
Com.
--
20
--
20
--
20
mA
Supply Current
I
OUT
= 0 mA, f = 0
Ind.
--
30
--
30
--
30
I
CC
2
Vcc Dynamic Operating
V
CC
= Max.,
CE
= V
IL
Com.
--
35
--
30
--
30
mA
Supply Current
I
OUT
= 0 mA, f = f
MAX
Ind.
--
45
--
40
--
40
I
SB
1
TTL Standby Current
V
CC
= Max.,
Com.
--
2
--
2
--
2
mA
(TTL Inputs)
V
IN
= V
IH
or V
IL
Ind.
--
5
--
5
--
5
CE
V
IH
, f = 0
I
SB
2
CMOS Standby
V
CC
= Max.,
Com.
--
90
--
90
--
90
A
Current (CMOS Inputs)
CE
V
CC
0.2V,
Ind.
--
200
--
200
--
200
V
IN
V
CC
0.2V, or
V
IN
0.2V, f = 0
Notes:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
= 1.0 mA
2.4
--
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 2.1 mA
--
0.4
V
V
IH
Input HIGH Voltage
2.2
V
CC
+ 0.3
V
V
IL
Input LOW Voltage
(1)
0.3
0.8
V
I
LI
Input Leakage
GND
V
IN
V
CC
Com.
2
2
A
Ind.
5
5
I
LO
Output Leakage
GND
V
OUT
V
CC
, Outputs Disabled Com.
2
2
A
Ind.
5
5
Notes:
1. V
IL
= 3.0V for pulse width less than 10 ns.
2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
CAPACITANCE
(1,2)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
5
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25C, f = 1 MHz, Vcc =3.3V.
IC62LV256
Integrated Circuit Solution Inc.
5
ALSR007-0A 10/5/2001
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-45 ns
-70 ns
-100 ns
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
45
--
70
--
100
--
ns
t
AA
Address Access Time
--
45
--
70
--
100
ns
t
OHA
Output Hold Time
2
--
2
--
2
--
ns
t
ACE
CE
Access Time
--
45
--
70
--
100
ns
t
DOE
OE
Access Time
--
25
--
35
--
50
ns
t
LZOE
(2)
OE
to Low-Z Output
0
--
0
--
0
--
ns
t
HZOE
(2)
OE
to High-Z Output
0
20
0
25
0
25
ns
t
LZCE
(2)
CE
to Low-Z Output
3
--
3
--
3
--
ns
t
HZCE
(2)
CE
to High-Z Output
0
20
0
25
0
25
ns
t
PU
(3)
CE
to Power-Up
0
--
0
--
0
--
ns
t
PD
(3)
CE
to Power-Down
--
30
--
50
--
50
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST LOADS
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
5 ns
Input and Output Timing
1.5V
and Reference Levels
Output Load
See Figures 1a and 1b
1213
100 pF
Including
jig and
scope
1378
OUTPUT
3.3V
Figure 1a.
Figure 1b.
1213
5 pF
Including
jig and
scope
1378
OUTPUT
3.3V
IC62LV256
6
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
50%
50%
t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACE
t
LZCE
t
HZOE
t
PD
HIGH-Z
t
PU
DATA VALID
t
HZCE
ISB
ADDRESS
OE
CE
D
OUT
SUPPLY
CURRENT
ICC
HIGH-Z
READ CYCLE NO. 2
(1,3)
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
Notes:
1.
WE
is HIGH for a Read Cycle.
2. The device is continuously selected.
OE
,
CE
= V
IL
.
3. Address is valid prior to or coincident with
CE
LOW transitions.
IC62LV256
Integrated Circuit Solution Inc.
7
ALSR007-0A 10/5/2001
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,2,3)
(Over Operating Range)
-45 ns
-70 ns
-100 ns
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
WC
Write Cycle Time
45
--
70
--
100
--
ns
t
SCE
CE
to Write End
35
--
60
--
80
--
ns
t
AW
Address Setup Time to Write End
25
--
60
--
80
--
ns
t
HA
Address Hold from Write End
0
--
0
--
0
--
ns
t
SA
Address Setup Time
0
--
0
--
0
--
ns
t
PWE
(4)
WE
Pulse Width
25
--
55
--
60
--
ns
t
SD
Data Setup to Write End
20
--
30
--
35
--
ns
t
HD
Data Hold from Write End
0
--
0
--
0
--
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured
500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of
CE
LOW and
WE
LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
4. Tested with
OE
HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1 (
WE
WE
WE
WE
WE Controlled)
(1,2)
DATA-IN VALID
DATA UNDEFINED
t
WC
t
SCE
t
AW
t
HA
t
PWE
t
HZWE
HIGH-Z
t
LZWE
t
SA
t
SD
t
HD
ADDRESS
CE
WE
D
OUT
D
IN
IC62LV256
8
Integrated Circuit Solution Inc.
ALSR007-0A 10/5/2001
WRITE CYCLE NO. 2 (
CE
CE
CE
CE
CE Controlled)
(1,2)
HIGH-Z
DATA UNDEFINED
DATA-IN VALID
t
WC
t
SCE
t
SA
t
HA
t
PWE
t
AW
t
HZWE
t
SD
t
HD
t
LZWE
ADDRESS
D
IN
CE
WE
D
OUT
Notes:
1. The internal write time is defined by the overlap of
CE
LOW and
WE
LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if
OE
V
IH
.
IC62LV256
Integrated Circuit Solution Inc.
9
ALSR007-0A 10/5/2001
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5
TH
ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
ORDERING INFORMATION
Commercial Range: 0C to +70C
Speed (ns)
Order Part No.
Package
45
IC62LV256-45N
300mil DIP
45
IC62LV256-45J
300mil SOJ
45
IC62LV256-45T
8*13.4mm TSOP-1
45
IC62LV256-45U
330mil SOP
70
IC62LV256-70N
300mil DIP
70
IC62LV256-70J
300mil SOJ
70
IC62LV256-70T
8*13.4mm TSOP-1
70
IC62LV256-70U
330mil SOP
100
IC62LV256-100N
300mil DIP
100
IC62LV256-100J
300mil SOJ
100
IC62LV256-100T
8*13.4mm TSOP-1
100
IC62LV256-100U
330mil SOP
ORDERING INFORMATION
Industrial Range: 40C to +85C
Speed (ns)
Order Part No.
Package
45
IC62LV256-45JI
300mil SOJ
45
IC62LV256-45TI
8*13.4mm TSOP-1
45
IC62LV256-45UI
330mil SOP
70
IC62LV256-70JI
300mil SOJ
70
IC62LV256-70TI
8*13.4mm TSOP-1
70
IC62LV256-70UI
330mil SOP
100
IC62LV256-100JI
300mil SOJ
100
IC62LV256-100TI
8*13.4mm TSOP-1
100
IC62LV256-100UI
330mil SOP