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Электронный компонент: IC62LV5128LL-100TI

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Integrated Circuit Solution Inc.
1
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
Document Title
512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM
Revision History
Revision No
History
Draft Date
Remark
0A
Initial Draft
May 1,2001
Preliminary
0B
1. Change for t
PWE
: 45 to 40 ns for 55 ns product
August 31,2001
: 60 to 40 ns for 70 ns product
2. Change for V
CC
: 2.2-3.6V to 2.7-3.6V
3.1 Change for I
CC
test conditiomn: V
CC
=Max. to 3V
3.2 Change for I
CC
: 30 to 25mA for 55 ns product
25 to 20mA for 70 ns porduct
20 to 15 mA for 100 ns product
4.1 Change for V
DR
Min. : 1.2 to 1.5V
4.2 Change for I
DR
test condition: V
CC
=1.2 to 1.5V and I
DR
5. Change for t
HZCE
25 to 20 ns for 55 ns product
6. Change for t
HZWE
33 to 30 ns for 70 ns product
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
2
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. Copyright 2000, Integrated Circuit Solution Inc.
DESCRIPTION
The
ICSI
IC62LV5128L and IC62LV5128LL is a low voltage,
524,288 words by 8 bits, CMOS SRAM. It is fabricated using
ICSI
's low voltage, six transistor (6T), CMOS technology. The
device is targeted to satisfy the demands of the state-of-the-art
technologies such as cell phones and pagers.
When
CE
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels. Additionally, easy memory expansion is
provided by using Chip Enable and Output Enable inputs,
CE
and
OE
. The active LOW Write Enable (
WE
) controls both
writing and reading of the memory.
The IC62LV5128L and IC62LV5128LL are available in 32-pin
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm TF-
BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A18
CE
OE
WE
512K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
512K x 8
LOW POWER and LOW V
CC
CMOS STATIC RAM
FEATURES
Access times of 55, 70, 100 ns
CMOS Low power operation:
--
60 mW (typical) operation
--
3 W (typical) standby
Low data retention voltage: 1.5V (min.)
Output Enable (
OE
) and Chip Enable
(
CE
) inputs for ease in applications
TTL compatible inputs and outputs
Fully static operation:
--
No clock or refresh reguired
Single 2.7V-3.6V power supply
Available in the 32-pin 8*20mm TSOP-1,
32-pin 8*13.4mm TSOP-1 and 48-pin
6*8mm TF-BGA
Integrated Circuit Solution Inc.
3
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
48
-
Pin 6*8mm TF
-
BGA
PIN DESCRIPTIONS
A0-A18
Address Inputs
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Data Input/Output
NC
No Connection
Vcc
Power
GND
Ground
1 2 3 4 5 6
A
B
C
D
E
F
G
H
A0
A1
NC
A3
A6
A8
I/O
4
A2
WE
A4
A7
I/O
0
I/O
5
NC
A5
I/O
1
GND
Vcc
Vcc
GND
I/O
6
A18
A17
I/O
2
I/O
7
OE
CE
A16
A15
I/O
3
A9
A10
A11
A12
A13
A14
OPERATING RANGE
Range
Ambient Temperature
V
CC
Commercial
0C to +70C
2.7V - 3.6V
Industrial
40C to +85C
2.7V - 3.6V
TRUTH TABLE
Mode
WE
WE
WE
WE
WE
CE
CE
CE
CE
CE
OE
OE
OE
OE
OE
I/O Operation
Vcc Current
Not Selected
X
H
X
High-Z
I
SB
1
, I
SB
2
Output Disabled
H
L
H
High-Z
I
CC
Read
H
L
L
D
OUT
I
CC
Write
L
L
X
D
IN
I
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
WE
A17
A15
Vcc
A18
A16
A14
A12
A7
A6
A5
A4
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
PIN CONFIGURATIONS
32
-
Pin 8*20mm TSOP
-
1, 8*13.4mm STSOP
-
1
4
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to Vcc + 0.5
V
V
CC
Vcc related to GND
0.3 to +4.0
V
T
BIAS
Temperature Under Bias
40 to +85
C
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
1
W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE
(1)(2)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
8
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25
o
C, f = 1 MHz, V
CC
= 3.0 V
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
= 1.0 mA
2.0
--
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 2.1 mA
--
0.4
V
V
IH
Input HIGH Voltage
(1)
2.2
V
CC
+ 0.3
V
V
IL
Input LOW Voltage
(2)
0.2
0.4
V
I
LI
Input Leakage
GND
V
IN
V
CC
1
1
A
I
LO
Output Leakage
GND
V
OUT
V
CC
1
1
A
Notes:
1. V
IH
(max)
=V
CC
+2.0V for pulse width less than 10ns.
2. V
IL
(min)
= 2.0V for pulse width less than 10 ns.
Integrated Circuit Solution Inc.
5
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
IC62LV5128L POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-
55
-
70
-
100
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Unit
I
CC
Vcc Dynamic Operating
V
CC
= 3V,
CE
= V
IL
Com.
--
25
--
20
--
15
mA
Supply Current
I
OUT
= 0 mA, f = f
MAX
Ind.
--
25
--
20
--
15
I
SB
1
TTL Standby Current
V
CC
= Max.,
Com.
--
0.2
--
0.2
--
0.2
mA
(TTL Inputs)
V
IN
= V
IH
or V
IL
,
Ind.
--
0.3
--
0.3
--
0.3
CE
V
IH
I
SB
2
CMOS Standby
V
CC
= Max., f = 0
Com.
--
35
--
35
--
35
A
Current (CMOS Inputs)
CE
V
CC
0.2V,
Ind.
--
50
--
50
--
50
V
IN
V
CC
0.2V or V
IN
0.2V
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IC62LV5128LL POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-55
-
70
-
100
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Unit
I
CC
Vcc Dynamic Operating
V
CC
= 3V,
CE
= V
IL
Com.
--
25
--
20
--
15
mA
Supply Current
I
OUT
= 0 mA, f = f
MAX
Ind.
--
25
--
20
--
15
I
SB
1
TTL Standby Current
V
CC
= Max.,
Com.
--
0.2
--
0.2
--
0.3
mA
(TTL Inputs)
V
IN
= V
IH
or V
IL
,
Ind.
--
0.3
--
0.3
--
0.3
CE
V
IH
I
SB
2
CMOS Standby
V
CC
= Max., f = 0
Com.
--
15
--
15
--
15
A
Current (CMOS Inputs)
CE
V
CC
0.2V,
Ind.
--
20
--
20
--
20
V
IN
V
CC
0.2V or V
IN
0.2V
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
6
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-55
-
70
-
100
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
55
--
70
--
100
--
ns
t
AA
Address Access Time
--
55
--
70
--
100
ns
t
OHA
Output Hold Time
10
--
10
--
15
--
ns
t
ACE
CE
Access Time
--
55
--
70
--
100
ns
t
DOE
OE
Access Time
--
30
--
35
--
50
ns
t
HZOE
(2)
OE
to High-Z Output
--
20
0
25
0
30
ns
t
LZOE
(2)
OE
to Low-Z Output
5
--
5
--
5
--
ns
t
LZCE
(2)
CE
to Low-Z Output
10
--
10
--
10
--
ns
t
HZCE
(2)
CE
to High-Z Output
0
20
0
25
0
30
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, input pulse levels of 0.4V to 2.2V and output
loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0.4V to 2.2V
Input Rise and Fall Times
5 ns
Input Reference Level
1.3V
Output Reference Level
1.5V
Output Load
See Figures 1 and 2
AC TEST LOADS
Figure 1
Figure 2
5 pF
Including
jig and
scope
OUTPUT
1 TTL
100 pF
Including
jig and
scope
OUTPUT
1 TTL
Integrated Circuit Solution Inc.
7
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACE
t
LZCE
t
HZOE
HIGH-Z
DATA VALID
ADDRESS
OE
CE
D
OUT
t
HZCE
Notes:
1.
WE
is HIGH for a Read Cycle.
2. The device is continuously selected.
OE
,
CE
= V
IL
.
3. Address is valid prior to or coincident with
CE
LOW transitions.
AC WAVEFORMS
READ CYCLE NO. 2
(1,3)
AC TEST LOADS
READ CYCLE NO.1
(1,2)
DATA VALID
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
8
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
-
55
-
70
-
100
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max
Unit
t
WC
Write Cycle Time
55
--
70
--
100
--
ns
t
SCE
CE
to Write End
50
--
65
--
80
--
ns
t
AW
Address Setup Time to Write End
50
--
65
--
80
--
ns
t
HA
Address Hold from Write End
0
--
0
--
0
--
ns
t
SA
Address Setup Time
0
--
0
--
0
--
ns
t
PWE
WE
Pulse Width
40
--
40
--
80
--
ns
t
SD
Data Setup to Write End
25
--
30
--
40
--
ns
t
HD
Data Hold from Write End
0
--
0
--
0
--
ns
t
HZWE
(3)
WE
LOW to High-Z Output
--
30
--
30
--
40
ns
t
LZWE
(3)
WE
HIGH to Low-Z Output
5
--
5
--
5
--
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, input pulse levels of 0.4V to 2.2V and output loading specified in
Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of
CE
LOW and
WE
LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,2)
(Over Operating Range, Standard and Low Power)
DATA-IN VALID
DATA UNDEFINED
t
WC
t
SCE
t
AW
t
HA
t
PWE
t
HZWE
HIGH-Z
t
LZWE
t
SA
t
SD
t
HD
ADDRESS
CE
WE
DOUT
DIN
AC WAVEFORMS
WRITE CYCLE NO. 1
(
CE
Controlled
)
Integrated Circuit Solution Inc.
9
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
WRITE CYCLE NO. 3
(
WE
Controlled:
OE
is LOW During Write Cycle)
)
DATA-IN VALID
DATA UNDEFINED
t
WC
t
SCE
t
AW
t
HA
t
PWE
t
HZWE
HIGH-Z
t
LZWE
t
SA
t
SD
t
HD
ADDRESS
CE
WE
DOUT
DIN
OE
WRITE CYCLE NO. 2
(
WE
Controlled:
OE
is HIGH During Write Cycle)
)
DATA-IN VALID
DATA UNDEFINED
t
WC
t
SCE
t
AW
t
HA
t
PWE
t
HZWE
HIGH-Z
t
LZWE
t
SA
t
SD
t
HD
ADDRESS
CE
WE
DOUT
DIN
OE
10
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol
Parameter
Test Condition
Min.
Max.
Unit
V
DR
Vcc for Data Retention
See Data Retention Waveform
1.5
3.6
V
I
DR
Data Retention Current
Vcc = 1.5V,
CE
Vcc 0.2V
Com. (-L)
--
10
A
Com. (-LL)
--
5
A
Ind. (-L)
--
15
A
Ind. (-LL)
--
9
A
t
SDR
Data Retention Setup Time
See Data Retention Waveform
0
--
ns
t
RDR
Recovery Time
See Data Retention Waveform
5
--
ns
DATA RETENTION WAVEFORM
(
CE
Controlled)
V
CC
CE
V
CC
- 0.2V
t
SDR
t
RDR
V
DR
CE
GND
2.7V
2.2V
Data Retention Mode
Integrated Circuit Solution Inc.
11
LPSR012-0B 08/31/2001
IC62LV5128L
IC62LV5128LL
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5
TH
ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
ORDERING INFORMATION
Commercial Range: 0C to +70C
Speed (ns) Order Part No.
Package
55
IC62LV5128L-55T
8*20mm TSOP-1
IC62LV5128L-55H
8*13.4mm TSOP-1
IC62LV5128L-55B
6*8mm TF-BGA
70
IC62LV5128L-70T
8*20mm TSOP-1
IC62LV5128L-70H
8*13.4mm TSOP-1
IC62LV5128L-70B
6*8mm TF-BGA
100
IC62LV5128L-100T
8*20mm TSOP-1
IC62LV5128L-100H
8*13.4mm TSOP-1
IC62LV5128L-100B
6*8mm TF-BGA
Industrial Range:
-
40C to +85C
Speed (ns) Order Part No.
Package
55
IC62LV5128L-55TI
8*20mm TSOP-1
IC62LV5128L-55HI
8*13.4mm TSOP-1
IC62LV5128L-55BI
6*8mm TF-BGA
70
IC62LV5128L-70TI
8*20mm TSOP-1
IC62LV5128L-70HI
8*13.4mm TSOP-1
IC62LV5128L-70BI
6*8mm TF-BGA
100
IC62LV5128L-100TI
8*20mm TSOP-1
IC62LV5128L-100HI
8*13.4mm TSOP-1
IC62LV5128L-100BI
6*8mm TF-BGA
ORDERING INFORMATION
Commercial Range: 0C to +70C
Speed (ns) Order Part No.
Package
55
IC62LV5128LL-55T
8*20mm TSOP-1
IC62LV5128LL-55H
8*13.4mm TSOP-1
IC62LV5128LL-55B
6*8mm TF-BGA
70
IC62LV5128LL-70T
8*20mm TSOP-1
IC62LV5128LL-70H
8*13.4mm TSOP-1
IC62LV5128LL-70B
6*8mm TF-BGA
100
IC62LV5128LL-100T 8*20mm TSOP-1
IC62LV5128LL-100H 8*13.4mm TSOP-1
IC62LV5128LL-100B 6*8mm TF-BGA
Industrial Range:
-
40C to +85C
Speed (ns) Order Part No.
Package
55
IC62LV5128LL-55TI
8*20mm TSOP-1
IC62LV5128LL-55HI
8*13.4mm TSOP-1
IC62LV5128LL-55BI
6*8mm TF-BGA
70
IC62LV5128LL-70TI
8*20mm TSOP-1
IC62LV5128LL-70HI
8*13.4mm TSOP-1
IC62LV5128LL-70BI
6*8mm TF-BGA
100
IC62LV5128LL-100TI 8*20mm TSOP-1
IC62LV5128LL-100HI 8*13.4mm TSOP-1
IC62LV5128LL-100BI 6*8mm TF-BGA