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8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
1
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
G
ENERAL
D
ESCRIPTION
The ICS8312 is a low skew, 1-to-12 LVCMOS /
LVTTL Fanout Buffer and a member of the
HiPerClockSTM family of High Performance Clock
Solutions from ICS. The ICS8312 single ended
clock input accepts LVCMOS or LVTTL input lev-
els. The low impedance LVCMOS outputs are designed to
drive 50
series or parallel terminated transmission lines. The
effective fanout can be increased from 12 to 24 by utilizing
the ability of the outputs to drive two series terminated lines.
The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply modes. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS8312 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
F
EATURES
12 LVCMOS / LVTTL outputs
LVCMOS / LVTTL clock input
Maximum output frequency: 250MHz
Output skew: 150ps (maximum)
Operating supply modes:
Core/Output
3.3V/3.3V,
2.5V/2.5V,
1.8V/1.8V,
3.3V/2.5V,
3.3V/1.8V,
2.5V/1.8V
0C to 85C ambient operating temperature
Lead-Free package available
Industrial temperature information available upon request
HiPerClockSTM
ICS
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
Q4
V
DDO
Q5
GND
Q6
V
DDO
Q7
GND
GND
V
DD
CLK_EN
CLK
GND
OE
V
DD
GND
GND
Q8
V
DDO
Q9
GND
Q10
V
DDO
Q11
GND
Q3
V
DDO
Q2
GND
Q1
V
DDO
Q0
ICS8312
32-Lead LQFP
7mm x 7mm x 1.4mm body package
Y Pacakge
Top View
Q0:Q11
CLK_EN
CLK
OE
nD
Q
LE
12
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
2
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
T
ABLE
1. P
IN
D
ESCRIPTIONS
T
ABLE
2. P
IN
C
HARACTERISTICS
T
ABLE
3A. O
UTPUT
E
NABLE
AND
C
LOCK
E
NABLE
F
UNCTION
T
ABLE
T
ABLE
3B. C
LOCK
I
NPUT
F
UNCTION
T
ABLE
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F
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
3
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V5%, T
A
= 0C
TO
85C
l
o
b
m
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S
r
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A
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 2.5V5%, T
A
= 0C
TO
85C
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0
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A
T
ABLE
4C. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 1.8V0.2V, T
A
= 0C
TO
85C
l
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2
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C
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p
p
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S
t
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p
t
u
O
0
1
A
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5 V
Outputs, V
O
-0.5V to V
DDO
+ 0.5V
Package Thermal Impedance,
JA
47.9C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
T
ABLE
4D. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 3.3V5%, V
DDO
= 2.5V5%, T
A
= 0C
TO
85C
l
o
b
m
y
S
r
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t
e
m
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5
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3
3
.
3
5
6
4
.
3
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V
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5
7
3
.
2
5
.
2
5
2
6
.
2
V
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0
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O
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C
y
l
p
p
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S
t
u
p
t
u
O
0
1
A
T
ABLE
4E. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 3.3V5%, V
DDO
= 1.8V0.2V, T
A
= 0C
TO
85C
l
o
b
m
y
S
r
e
t
e
m
a
r
a
P
s
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V
D
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C
5
3
1
.
3
3
.
3
5
6
4
.
3
V
V
O
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O
6
.
1
8
.
1
0
.
2
V
I
D
D
t
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p
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0
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I
O
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n
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r
u
C
y
l
p
p
u
S
t
u
p
t
u
O
0
1
A
T
ABLE
4F. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 2.5V5%, V
DDO
= 1.8V0.2V, T
A
= 0C
TO
85C
l
o
b
m
y
S
r
e
t
e
m
a
r
a
P
s
n
o
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t
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s
e
T
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x
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n
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V
D
D
e
g
a
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p
p
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o
C
5
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3
.
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5
.
2
5
2
6
.
2
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V
O
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1
0
.
2
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D
D
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O
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t
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r
r
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C
y
l
p
p
u
S
t
u
p
t
u
O
0
1
A
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
4
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
T
ABLE
4F. LVCMOS DC C
HARACTERISTICS
,
T
A
= 0C
TO
85C
l
o
b
m
y
S
r
e
t
e
m
a
r
a
P
s
n
o
i
t
i
d
n
o
C
t
s
e
T
m
u
m
i
n
i
M
l
a
c
i
p
y
T
m
u
m
i
x
a
M
s
t
i
n
U
V
H
I
e
g
a
t
l
o
V
h
g
i
H
t
u
p
n
I
K
L
C
V
D
D
%
5
V
3
.
3
=
2
V
D
D
3
.
0
+
V
V
D
D
%
5
V
5
.
2
=
7
.
1
V
D
D
3
.
0
+
V
V
D
D
V
2
.
0
V
8
.
1
=
V
*
5
6
.
0
D
D
V
D
D
3
.
0
+
V
E
O
,
N
E
_
K
L
C
V
D
D
%
5
V
3
.
3
=
2
V
D
D
3
.
0
+
V
V
D
D
%
5
V
5
.
2
=
7
.
1
V
D
D
3
.
0
+
V
V
D
D
V
2
.
0
V
8
.
1
=
V
*
5
6
.
0
D
D
V
D
D
3
.
0
+
V
V
L
I
e
g
a
t
l
o
V
w
o
L
t
u
p
n
I
K
L
C
V
D
D
%
5
V
3
.
3
=
3
.
0
-
3
.
1
V
V
D
D
%
5
V
5
.
2
=
3
.
0
-
7
.
0
V
V
D
D
V
2
.
0
V
8
.
1
=
3
.
0
-
V
*
5
3
.
0
D
D
V
E
O
,
N
E
_
K
L
C
V
D
D
%
5
V
3
.
3
=
3
.
0
-
3
.
1
V
V
D
D
%
5
V
5
.
2
=
3
.
0
-
7
.
0
V
V
D
D
V
2
.
0
V
8
.
1
=
3
.
0
-
V
*
5
3
.
0
D
D
V
I
H
I
t
n
e
r
r
u
C
h
g
i
H
t
u
p
n
I
K
L
C
V
D
D
%
5
V
3
.
3
=
0
5
1
A
V
D
D
%
5
V
5
.
2
=
0
5
1
A
V
D
D
V
2
.
0
V
8
.
1
=
0
5
1
A
E
O
,
N
E
_
K
L
C
V
D
D
%
5
V
3
.
3
=
5
A
V
D
D
%
5
V
5
.
2
=
5
A
V
D
D
V
2
.
0
V
8
.
1
=
5
A
I
L
I
t
n
e
r
r
u
C
w
o
L
t
u
p
n
I
K
L
C
V
D
D
%
5
V
3
.
3
=
5
-
A
V
D
D
%
5
V
5
.
2
=
5
-
A
V
D
D
V
2
.
0
V
8
.
1
=
5
-
A
E
O
,
N
E
_
K
L
C
V
D
D
%
5
V
3
.
3
=
0
5
1
-
A
V
D
D
%
5
V
5
.
2
=
0
5
1
-
A
V
D
D
V
2
.
0
V
8
.
1
=
0
5
1
-
A
V
H
O
e
g
a
t
l
o
V
h
g
i
H
t
u
p
t
u
O
V
O
D
D
1
E
T
O
N
;
%
5
V
3
.
3
=
6
.
2
V
V
O
D
D
I
;
%
5
V
5
.
2
=
H
O
A
m
1
-
=
2
V
V
O
D
D
1
E
T
O
N
;
%
5
V
5
.
2
=
8
.
1
V
V
O
D
D
I
;
V
2
.
0
V
8
.
1
=
H
O
A
u
0
0
1
-
=
V
D
D
2
.
0
-
V
V
O
D
D
1
E
T
O
N
;
V
2
.
0
V
8
.
1
=
V
D
D
3
.
0
-
V
V
L
O
e
g
a
t
l
o
V
w
o
L
t
u
p
t
u
O
V
O
D
D
1
E
T
O
N
;
%
5
V
3
.
3
=
5
.
0
V
V
O
D
D
I
;
%
5
V
5
.
2
=
L
O
A
m
1
=
4
.
0
V
V
O
D
D
1
E
T
O
N
;
%
5
V
5
.
2
=
5
4
.
0
V
V
O
D
D
I
;
V
2
.
0
V
8
.
1
=
L
O
A
u
0
0
1
=
2
.
0
V
V
O
D
D
1
E
T
O
N
;
V
2
.
0
V
8
.
1
=
5
3
.
0
V
0
5
h
t
i
w
d
e
t
a
n
i
m
r
e
t
s
t
u
p
t
u
O
:
1
E
T
O
N
V
o
t
O
D
D
.
s
m
a
r
g
a
i
d
"
t
i
u
c
r
i
C
t
s
e
T
d
a
o
L
"
,
n
o
i
t
c
e
s
t
n
e
m
e
r
u
s
a
e
M
r
e
t
e
m
a
r
a
P
e
e
S
.
2
/
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
5
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
T
ABLE
5B. AC C
HARACTERISTICS
,
V
DD
= V
DDO
= 2.5V5%, T
A
= 0C
TO
85C
T
ABLE
5A. AC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V5%, T
A
= 0C
TO
85C
l
o
b
m
y
S
r
e
t
e
m
a
r
a
P
s
n
o
i
t
i
d
n
o
C
t
s
e
T
m
u
m
i
n
i
M
l
a
c
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p
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T
m
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F
t
u
p
t
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0
5
2
z
H
M
p
t
H
L
1
E
T
O
N
;
h
g
i
H
o
t
w
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L
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a
l
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n
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g
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M
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5
2
2
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1
9
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1
5
.
2
s
n
t
)
o
(
k
s
5
,
2
E
T
O
N
;
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e
k
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t
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p
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5
2
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p
(
k
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5
,
3
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T
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N
;
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t
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t
r
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P
0
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8
s
p
t
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/t
F
4
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T
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N
;
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m
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T
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s
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R
t
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p
t
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0
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t
%
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p
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M
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%
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t
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g
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l
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t
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2
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M
p
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L
1
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T
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N
;
h
g
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t
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l
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t
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M
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1
3
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2
2
.
3
s
n
t
)
o
(
k
s
5
,
2
E
T
O
N
;
w
e
k
S
t
u
p
t
u
O
0
5
1
s
p
t
)
p
p
(
k
s
5
,
3
E
T
O
N
;
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e
k
S
t
r
a
P
-
o
t
-
t
r
a
P
1
.
1
s
n
t
R
/t
F
4
E
T
O
N
;
e
m
i
T
e
s
i
R
t
u
p
t
u
O
%
0
8
o
t
%
0
2
0
0
2
0
0
7
s
p
c
d
o
e
l
c
y
C
y
t
u
D
t
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p
t
u
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f
z
H
M
0
5
1
5
4
5
5
%
.
e
s
i
w
r
e
h
t
o
d
e
t
o
n
s
s
e
l
n
u
X
A
M
f
t
a
d
e
r
u
s
a
e
m
s
r
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t
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m
a
r
a
p
ll
A
h
g
u
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r
h
t
1
s
e
t
o
N
r
o
f
w
o
l
e
b
d
e
t
s
il
C
5
e
l
b
a
T
e
e
S
T
ABLE
5C. AC C
HARACTERISTICS
,
V
DD
= V
DDO
= 1.8V0.2V, T
A
= 0C
TO
85C
l
o
b
m
y
S
r
e
t
e
m
a
r
a
P
s
n
o
i
t
i
d
n
o
C
t
s
e
T
m
u
m
i
n
i
M
l
a
c
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p
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T
m
u
m
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x
a
M
s
t
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n
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f
X
A
M
y
c
n
e
u
q
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r
F
t
u
p
t
u
O
0
0
2
z
H
M
p
t
H
L
1
E
T
O
N
;
h
g
i
H
o
t
w
o
L
y
a
l
e
D
n
o
i
t
a
g
a
p
o
r
P
f
z
H
M
0
0
2
6
.
1
3
.
3
8
.
4
s
n
t
)
o
(
k
s
5
,
2
E
T
O
N
;
w
e
k
S
t
u
p
t
u
O
0
4
1
s
p
t
)
p
p
(
k
s
5
,
3
E
T
O
N
;
w
e
k
S
t
r
a
P
-
o
t
-
t
r
a
P
3
.
2
s
n
t
R
/t
F
4
E
T
O
N
;
e
m
i
T
e
s
i
R
t
u
p
t
u
O
%
0
8
o
t
%
0
2
0
0
2
0
0
8
s
p
c
d
o
e
l
c
y
C
y
t
u
D
t
u
p
t
u
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f
z
H
M
0
0
1
5
4
5
5
%
f
t
a
d
e
r
u
s
a
e
m
s
r
e
t
e
m
a
r
a
p
ll
A
X
A
M
.
e
s
i
w
r
e
h
t
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d
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t
o
n
s
s
e
l
n
u
V
m
o
r
f
d
e
r
u
s
a
e
M
:
1
E
T
O
N
D
D
V
o
t
t
u
p
n
i
e
h
t
f
o
2
/
O
D
D
.
t
u
p
t
u
o
e
h
t
f
o
2
/
V
t
a
d
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r
u
s
a
e
M
.
s
n
o
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t
i
d
n
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c
d
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l
l
a
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q
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h
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w
d
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a
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l
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v
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l
p
p
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m
a
s
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h
t
t
a
s
t
u
p
t
u
o
n
e
e
w
t
e
b
w
e
k
s
s
a
d
e
n
i
f
e
D
:
2
E
T
O
N
O
D
D
.
2
/
l
a
u
q
e
h
t
i
w
d
n
a
s
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g
a
t
l
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v
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l
p
p
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f
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w
t
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b
w
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k
s
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h
t
s
a
d
e
n
i
f
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D
:
3
E
T
O
N
V
t
a
d
e
r
u
s
a
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m
e
r
a
s
t
u
p
t
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t
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c
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v
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d
h
c
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t
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p
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t
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m
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h
t
g
n
i
s
U
.
s
n
o
i
t
i
d
n
o
c
d
a
o
l
O
D
D
.
2
/
.
n
o
i
t
c
u
d
o
r
p
n
i
d
e
t
s
e
t
t
o
N
.
n
o
i
t
a
z
i
r
e
t
c
a
r
a
h
c
y
b
d
e
e
t
n
a
r
a
u
g
e
r
a
s
r
e
t
e
m
a
r
a
p
e
s
e
h
T
:
4
E
T
O
N
.
5
6
d
r
a
d
n
a
t
S
C
E
D
E
J
h
t
i
w
e
c
n
a
d
r
o
c
c
a
n
i
d
e
n
i
f
e
d
s
i
r
e
t
e
m
a
r
a
p
s
i
h
T
:
5
E
T
O
N
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
6
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
T
ABLE
5D. AC C
HARACTERISTICS
,
V
DD
= 3.3V5%, V
DDO
= 2.5V5%, T
A
= 0C
TO
85C
l
o
b
m
y
S
r
e
t
e
m
a
r
a
P
s
n
o
i
t
i
d
n
o
C
t
s
e
T
m
u
m
i
n
i
M
l
a
c
i
p
y
T
m
u
m
i
x
a
M
s
t
i
n
U
f
X
A
M
y
c
n
e
u
q
e
r
F
t
u
p
t
u
O
0
5
2
z
H
M
p
t
H
L
1
E
T
O
N
;
h
g
i
H
o
t
w
o
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8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
7
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
P
ARAMETER
M
EASUREMENT
I
NFORMATION
SCOPE
Qx
LVCMOS
1.8V C
ORE
/1.8V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
2.40.9V
V
DDO
-0.9V0.1V
V
DD
0.9V0.1V
SCOPE
Qx
LVCMOS
2.5V C
ORE
/2.5V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
2.05V5%
V
DDO
-1.25V5%
V
DD
1.25V5%
3.3V C
ORE
/3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
SCOPE
Qx
LVCMOS
1.65V5%
-1.165V5%
3.3V C
ORE
/2.5V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
3.3V C
ORE
/1.8V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
2.5 C
ORE
/1.8V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
SCOPE
Qx
LVCMOS
1.25V5%
-1.25V5%
SCOPE
Qx
LVCMOS
0.9V 0.1V
-0.9V 0.1V
SCOPE
Qx
LVCMOS
2.05V5%
V
DDO
-0.9V0.1V
V
DD
0.9V0.1V
V
DD
,
V
DDO
V
DD
,
V
DDO
V
DD
,
V
DDO
GND
GND
GND
GND
GND
GND
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
8
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
Pulse Width
t
PERIOD
t
PW
t
PERIOD
odc =
V
DDO
2
Q0:Q11
t
PD
V
DD
2
V
DDO
2
CLK
Q0:Q11
O
UTPUT
R
ISE
/F
ALL
T
IME
P
ART
-
TO
-P
ART
S
KEW
O
UTPUT
S
KEW
P
ROPAGATION
D
ELAY
O
UTPUT
D
UTY
C
YCLE
/P
LUSE
W
IDTH
/P
ERIOD
tsk(o)
V
DDO
2
V
DDO
2
Qy
Qx
tsk(pp)
V
DDO
2
V
DDO
2
Qy
Qx
Part 1
Part 2
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
9
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
R
ELIABILITY
I
NFORMATION
T
RANSISTOR
C
OUNT
The transistor count for ICS8312 is: 339
T
ABLE
6.
JA
VS
. A
IR
F
LOW
T
ABLE
FOR
32 L
EAD
LQFP


JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
67.8C/W
55.9C/W
50.1C/W
Multi-Layer PCB, JEDEC Standard Test Boards
47.9C/W
42.1C/W
39.4C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
10
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
P
ACKAGE
O
UTLINE
- Y S
UFFIX
FOR
32 L
EAD
LQFP
T
ABLE
7. P
ACKAGE
D
IMENSIONS
N
O
I
T
A
I
R
A
V
C
E
D
E
J
S
R
E
T
E
M
I
L
L
I
M
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S
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O
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S
N
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M
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D
L
L
A
L
O
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Y
S
A
B
B
M
U
M
I
N
I
M
L
A
N
I
M
O
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U
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I
X
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M
N
2
3
A
-
-
-
-
0
6
.
1
1
A
5
0
.
0
-
-
5
1
.
0
2
A
5
3
.
1
0
4
.
1
5
4
.
1
b
0
3
.
0
7
3
.
0
5
4
.
0
c
9
0
.
0
-
-
0
2
.
0
D
C
I
S
A
B
0
0
.
9
1
D
C
I
S
A
B
0
0
.
7
2
D
.
f
e
R
0
6
.
5
E
C
I
S
A
B
0
0
.
9
1
E
C
I
S
A
B
0
0
.
7
2
E
.
f
e
R
0
6
.
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e
C
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S
A
B
0
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.
0
L
5
4
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0
6
.
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0




0
-
-
7
c
c
c
-
-
-
-
0
1
.
0
Reference Document: JEDEC Publication 95, MS-026
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
11
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
T
ABLE
8. O
RDERING
I
NFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
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The aforementioned trademark, HiPerClockSTM is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
8312AY
http://www.icst.com/products/hiperclocks.html
REV. C JUNE 14, 2004
12
Integrated
Circuit
Systems, Inc.
ICS8312
L
OW
S
KEW
, 1-
TO
-12
LVCMOS / LVTTL F
ANOUT
B
UFFER
T
E
E
H
S
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R
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T
S
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