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85211BMI-03
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 15, 2005
1
Integrated
Circuit
Systems, Inc.
ICS85211BI-03
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
G
ENERAL
D
ESCRIPTION
The ICS85211BI-03 is a low skew, high perfor-
mance 1-to-2 Differential-to-LVHSTL Fanout
Buffer and a member of the HiPerClockSTM
family of High Performance Clock Solutions
from ICS. The CLK, nCLK pair can accept most
standard differential input levels.The ICS85211BI-03 is char-
acterized to operate from a 3.3V power supply. Guar-
anteed output and par t-to-par t skew character istics
make the ICS85211BI-03 ideal for those clock distribu-
tion applications demanding well defined performance
and repeatability.
F
EATURES
Two differential LVHSTL compatible outputs
One differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 700MHz
Translates any single-ended input signal to
LVHSTL levels with resistor bias on nCLK input
Output skew: 30ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.3ns (maximum)
Output duty cycle: 49% - 51% up to 266.6MHz
V
OH
= 1.15V (maximum)
3.3V operating supply
-40C to 85C ambient operating temperature
Available in both standard and lead-free RoHS-compliant
packages
HiPerClockSTM
ICS
ICS85211BI-03
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
Q0
nQ0
Q1
nQ1
1
2
3
4
V
DD
CLK
nCLK
GND
8
7
6
5
Q0
nQ0
Q1
nQ1
CLK
nCLK
85211BMI-03
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 15, 2005
2
Integrated
Circuit
Systems, Inc.
ICS85211BI-03
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
T
ABLE
1. P
IN
D
ESCRIPTIONS
T
ABLE
2. P
IN
C
HARACTERISTICS
T
ABLE
3. C
LOCK
I
NPUT
F
UNCTION
T
ABLE
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85211BMI-03
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 15, 2005
3
Integrated
Circuit
Systems, Inc.
ICS85211BI-03
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
T
ABLE
4B. D
IFFERENTIAL
DC C
HARACTERISTICS
,
V
DD
= 3.3V 5%, T
A
= -40C
TO
85C
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HARACTERISTICS
,
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= 3.3V 5%, T
A
= -40C
TO
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UPPLY
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DD
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A
= -40C
TO
85C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5 V
Outputs, I
O
Continuous Current
50mA
Surge Current
100mA
Package Thermal Impedance,
JA
112.7C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
85211BMI-03
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 15, 2005
4
Integrated
Circuit
Systems, Inc.
ICS85211BI-03
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
T
ABLE
5. AC C
HARACTERISTICS
,
V
DD
= 3.3V 5%, T
A
= -40C
TO
85C
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85211BMI-03
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 15, 2005
5
Integrated
Circuit
Systems, Inc.
ICS85211BI-03
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
V
SW I N G
t
PW
t
PERIOD
t
PW
t
PERIOD
odc =
x 100%
nQ0, nQ1
Q0, Q1
t
PD
nCLK
CLK
nQ0, nQ1
Q0, Q1
Qx
nQx
Qy
nQy
PART 1
PART 2
t
sk(pp)
3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
D
IFFERENTIAL
I
NPUT
L
EVEL
P
ART
-
TO
-P
ART
S
KEW
O
UTPUT
S
KEW
O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
P
ERIOD
O
UTPUT
R
ISE
/F
ALL
T
IME
P
ROPAGATION
D
ELAY
P
ARAMETER
M
EASUREMENT
I
NFORMATION
t
sk(o)
nQx
Qx
nQy
Qy
V
CMR
Cross Points
V
PP
nCLK
CLK
GND
V
DD
SCOPE
LVHSTL
Qx
nQx
3.3V5%
0V
GND
V
DD