MK2703
MDS 2703 D
1
Revision 031903
I n t e g r a t e d C i r c u i t S y s t e m s
q
5 2 5 R a c e S t r e e t , S a n J o s e , CA 9 5 1 2 6
q
t e l ( 4 0 8 ) 2 9 5 - 9 8 0 0
q
w w w. ic s t . c o m
PLL A
UDIO
C
LOCK
S
YNTHESIZER
Description
The MK2703 is a low cost, low jitter, high performance
PLL clock synthesizer designed to replace oscillators
and PLL circuits in set-top box and multimedia
systems. Using ICS' patented analog Phase Locked
Loop (PLL) techniques, the device uses a 27 MHz
crystal or clock input to produce a buffered reference
clock and a selectable audio clock.
ICS manufactures the largest variety of Set-Top Box
and multimedia clock synthesizers for all applications.
Consult ICS to eliminate VCXOs, crystals and
oscillators from your board.
Features
Packaged in 8 pin SOIC
Uses an inexpensive, fundamental mode crystal or
clock
Supports MPEG sampling rates of 32 kHz, 44.1 kHz,
48 kHz, and 96 kHz
Patented zero ppm synthesis error in all clocks
All frequencies are frequency locked
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3V or 5V
Industrial temperature version available
Block Diagram
Audio Clock
PLL Clock
Synthesis
and Control
Circuitry
27 MHz
crystal or
clock input
VDD
Crystal
Oscillator
S1:0
X1
X2
27M
GND
2
Capacitors are required for crystal tuning
PLL A
UDIO
C
LOCK
S
YNTHESIZER
MDS 2703 D
2
Revision 031903
I n t e g r a t e d C i r c u i t S y s t e m s
q
5 2 5 Ra c e S t r e e t , S a n J o s e , C A 9 5 1 2 6
q
t e l ( 4 0 8 ) 2 9 5 - 9 8 0 0
q
w w w. i c s t . c o m
MK2703
Pin Assignment
8 pin (150 mil) SOIC
A
UDIO
C
LOCK
O
UTPUT
S
ELECT
T
ABLE
Key: 0 = Connect pin directly to ground
1 = Connect pin directly to VDD
Pin Descriptions
External Components
Decoupling Capacitor
As with any high performance mixed-signal IC, the
MK2703 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01F must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the MK2703 to minimize lead
inductance. No external power supply filtering is
required for the MK2703.
Series Termination Resistor
A 33
terminating resistor can be used next to the
clock outputs for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 16 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz
crystal should be used. The device crystal connections
should include pads for small capacitors from X1 to
ground and from X2 to ground. These capacitors are
used to adjust the stray capacitance of the board to
X1
VDD
GND
S0
27M
S1
CLK
X2
1
2
3
4
8
7
6
5
S1
S0
CLK (MHz)
0
0
8.192
0
1
11.2896
1
0
12.288
1
1
24.576
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1
XI
Crystal Connection. Connect to a 27 MHz fundamental crystal or clock.
2
VDD
Power
Connect to +3.3V or +5V.
3
GND
Power
Connect to ground.
4
27M
Output
27 MHz buffered reference clock output.
5
CLK
Output
Audio clock output per table above.
6
S1
Input
Audio clock frequency select input #1. Determines CLK output per table
above. Internal pull-up resistor.
7
S0
Input
Audio clock frequency select input #0. Determines CLK output per table
above. Internal pull-up resistor.
8
X2
XO
Crystal connection to a 27 MHz crystal, or leave unconnected for clock
output.
PLL A
UDIO
C
LOCK
S
YNTHESIZER
MDS 2703 D
3
Revision 031903
I n t e g r a t e d C i r c u i t S y s t e m s
q
5 2 5 Ra c e S t r e e t , S a n J o s e , C A 9 5 1 2 6
q
t e l ( 4 0 8 ) 2 9 5 - 9 8 0 0
q
w w w. i c s t . c o m
MK2703
match the nominally required crystal load capacitance.
Because load capacitance can only be increased in this
trimming process, it is important to keep stray
capacitance to a minimum by using very short PCB
traces (and no vias) between the crystal and device.
Crystal capacitors, if needed, must be connected from
each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal
(C
L
-16pF)*2. In this equation, C
L
= crystal load
capacitance in pF. Example: For a crystal with an 18 pF
load capacitance, each crystal capacitor would be 4 pF
[(18-16) x 2] = 4.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK2703. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Recommended Operation Conditions
DC Electrical Characteristics
VDD=3.3V 5%
, Ambient temperature -40 to +85
C, unless stated otherwise
Item
Rating
Supply Voltage, VDD
-0.5V to 7V
All Inputs and Outputs
-0.5V to VDD+0.5V
Ambient Operating Temperature, MK2703S
0 to +70
C
Ambient Operating Temperature, MK2703SI
-40 to +85
C
Storage Temperature
-65 to +150
C
Soldering Temperature
260
C
Parameter
Min.
Typ.
Max.
Units
Ambient Operating Temperature
0
+70
C
Power Supply Voltage (measured in respect to GND)
+3.13
+5.50
V
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Voltage
VDD
3.13
5.50
V
Input High Voltage
V
IH
X1 pin only
Note 1
(VDD/2)+1 VDD/2
V
Input Low Voltage
V
IL
X1 pin only
Note 1
VDD/2 (VDD/2)-1
V
Input High Voltage
V
IH
S0, S1 pins
2.0
V
Input Low Voltage
V
IL
S0, S1 pins
0.8
V
PLL A
UDIO
C
LOCK
S
YNTHESIZER
MDS 2703 D
4
Revision 031903
I n t e g r a t e d C i r c u i t S y s t e m s
q
5 2 5 Ra c e S t r e e t , S a n J o s e , C A 9 5 1 2 6
q
t e l ( 4 0 8 ) 2 9 5 - 9 8 0 0
q
w w w. i c s t . c o m
MK2703
Note 1: CMOS level input. Nominal trigger point is VDD/2 for 3.3V or 5V operation
AC Electrical Characteristics
VDD = 3.3V 5%
, Ambient Temperature -40 to +85
C, unless stated otherwise
Note 1: Measured with 15 pF load.
Thermal Characteristics
Output High Voltage
V
OH
I
OH
= -12 mA
2.4
V
Output Low Voltage
V
OL
I
OL
= 12 mA
0.4
V
Output High Voltage, CMOS level
V
OH
I
OH
= -4 mA
VDD-0.4
V
Operating Supply Current
IDD
No load
VDD = 3.3.V
25
mA
Short Circuit Current
CLK output
+50
mA
Input Capacitance
C
IN
S0, S1 pins
5
pF
Nominal Output Impedance
20
Frequency Synthesis Error
All Clocks
0
ppm
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Crystal or Clock Frequency
F
IN
27
MHz
Input Crystal Accuracy
30
ppm
Output Clock Rise Time
t
OR
0.8 to 2.0 V, Note 1
1.5
ns
Output Clock Fall Time
t
OF
2.0 to 8.0 V, Note 1
1.5
ns
Output Clock Duty Cycle
at VDD/2, Note 1
40
60
%
Maximum Absolute Jitter, short
t
ja
Deviation from mean
190
ps
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Thermal Resistance Junction to
Ambient
JA
Still air
150
C/W
JA
1 m/s air flow
140
C/W
JA
3 m/s air flow
120
C/W
Thermal Resistance Junction to Case
JC
40
C/W
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
PLL A
UDIO
C
LOCK
S
YNTHESIZER
MDS 2703 D
5
Revision 031903
I n t e g r a t e d C i r c u i t S y s t e m s
q
5 2 5 Ra c e S t r e e t , S a n J o s e , C A 9 5 1 2 6
q
t e l ( 4 0 8 ) 2 9 5 - 9 8 0 0
q
w w w. i c s t . c o m
MK2703
Marking Diagram - MK2703S
Notes:
1. Line 1 is Company Logo
2. Line 2 is the ICS Part Number
3. YYWW is the last two digits of the year and the week number that the part was assembled
Marking Diagram - MK2703SI
Notes:
1. ###### is the lot number
2. YYWW is the last two digits of the year and the week number that the part was assembled
CLO CK
MK2703S
YYW W
MK2703SI
######
YYW W
PLL A
UDIO
C
LOCK
S
YNTHESIZER
MDS 2703 D
6
Revision 031903
I n t e g r a t e d C i r c u i t S y s t e m s
q
5 2 5 Ra c e S t r e e t , S a n J o s e , C A 9 5 1 2 6
q
t e l ( 4 0 8 ) 2 9 5 - 9 8 0 0
q
w w w. i c s t . c o m
MK2703
Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Ordering Information
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
Part / Order Number
(Note 1)
Marking
Shipping packaging
Package
Temperature
MK2703S
MK2703S
Tubes
8 pin SOIC
0 to +70
C
MK2703STR
MK2703S
Tape and Reel
8 pin SOIC
0 to +70
C
MK2703SI
MK2703I
Tubes
8 pin SOIC
-40 to +85
C
MK2703SITR
MK2703I
Tape and Reel
8 pin SOIC
-40 to +85
C
INDEX
AREA
1 2
8
D
E
SEATING
PLANE
A1
A
e
- C -
B
.10 (.004)
C
C
L
H
h x 45
Millimeters
Inches
Symbol
Min
Max
Min
Max
A
1.35
1.75
.0532
.0688
A1
0.10
0.25
.0040
.0098
B
0.33
0.51
.013
.020
C
0.19
0.25
.0075
.0098
D
4.80
5.00
.1890
.1968
E
3.80
4.00
.1497
.1574
e
1.27 BASIC
0.050 BASIC
H
5.80
6.20
.2284
.2440
h
0.25
0.50
.010
.020
L
0.40
1.27
.016
.050
0
8
0
8
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