843021AG
www.icst.com/products/hiperclocks.html
REV. C MARCH 31, 2005
1
Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
G
ENERAL
D
ESCRIPTION
The ICS843021 is a Gigabit Ethernet Clock
Generator and a member of the HiPerClocks
TM
family of high performance devices from ICS. The
ICS843021 uses a 25MHz crystal to synthesize
125MHz. The ICS843021 has excellent phase jitter
performance, over the 1.875MHz 20MHz integration range.
The ICS843021 is packaged in a small 8-pin TSSOP, making it
ideal for use in systems with limited board space.
F
EATURES
1 differential 3.3V LVPECL output
Crystal oscillator interface designed for 22.4MHz - 28MHz,
18pF parallel resonant crystal
Output frequency range: 112MHz - 140MHz
VCO range: 560MHz to 700MHz
Output duty cycle range: 49% - 51%
RMS phase jitter @ 125MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.37ps (typical)
RMS phase noise at 125MHz (typical)
Offset
Noise Power
100Hz ............... -94.2 dBc/Hz
1KHz .............. -122.8 dBc/Hz
10KHz .............. -132.2 dBc/Hz
100KHz .............. -131.3 dBc/Hz
3.3V operating supply
0C to 70C ambient operating temperature
Industrial temperature information available upon request
Lead-Free package fully RoHS compliant
HiPerClockSTM
ICS
ICS843021
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
V
CCA
V
EE
XTAL_OUT
XTAL_IN
1
2
3
4
V
CC
Q0
nQ0
nc
8
7
6
5
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
OSC
Phase
Detector
VCO
5
25
(fixed)
XTAL_IN
XTAL_OUT
nQ0
Q0
25MHz
F
REQUENCY
T
ABLE
- T
YPICAL
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PPLICATIONS
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1
843021AG
www.icst.com/products/hiperclocks.html
REV. C MARCH 31, 2005
2
Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
T
ABLE
2. P
IN
C
HARACTERISTICS
T
ABLE
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ESCRIPTIONS
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843021AG
www.icst.com/products/hiperclocks.html
REV. C MARCH 31, 2005
3
Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
T
ABLE
3A. P
OWER
S
UPPLY
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HARACTERISTICS
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CC
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A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, I
O
Continuous Current
50mA
Surge Current
100mA
Package Thermal Impedance,
JA
101.7C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
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843021AG
www.icst.com/products/hiperclocks.html
REV. C MARCH 31, 2005
4
Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
T
YPICAL
P
HASE
N
OISE
AT
125MH
Z
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
100k
1M
10M
100M
125MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.37ps (typical)
Phase Noise Result by adding
a 10 Gb Ethernet Filter to raw data
Raw Phase Noise Data
10 Gb Ethernet Filter
O
FFSET
F
REQUENCY
(H
Z
)
dBc
Hz
N
OISE
P
OWER
843021AG
www.icst.com/products/hiperclocks.html
REV. C MARCH 31, 2005
5
Integrated
Circuit
Systems, Inc.
ICS843021
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
P
ARAMETER
M
EASUREMENT
I
NFORMATION
O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
O
UTPUT
R
ISE
/F
ALL
T
IME
3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
SCOPE
Qx
nQx
LVPECL
2V
-1.3V 0.33V
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
V
SW I N G
Pulse Width
t
PERIOD
t
PW
t
PERIOD
odc =
Q0
nQ0
V
EE
V
CC
RMS P
HASE
J
ITTER
Phase Noise Mask
Offset Frequency
f
1
f
2
Phase Noise Plot
RMS Jitter = Area Under the Masked Phase Noise Plot
Noise P
o
w
er
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